From patchwork Tue Mar 18 23:51:32 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arun Shamanna Lakshmi X-Patchwork-Id: 3849751 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6DAC7BF540 for ; Tue, 18 Mar 2014 23:51:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6AB9820386 for ; Tue, 18 Mar 2014 23:51:41 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id 7DD032037D for ; Tue, 18 Mar 2014 23:51:38 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id B7F22264EED; Wed, 19 Mar 2014 00:51:36 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from alsa0.perex.cz (localhost [IPv6:::1]) by alsa0.perex.cz (Postfix) with ESMTP id 83BBE264EF3; Wed, 19 Mar 2014 00:51:26 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 9EB232625CF; Wed, 19 Mar 2014 00:51:25 +0100 (CET) Received: from hqemgate14.nvidia.com (hqemgate14.nvidia.com [216.228.121.143]) by alsa0.perex.cz (Postfix) with ESMTP id 592142625CF for ; Wed, 19 Mar 2014 00:51:18 +0100 (CET) Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com id ; Tue, 18 Mar 2014 16:51:40 -0700 Received: from hqemhub01.nvidia.com ([172.20.12.94]) by hqnvupgp08.nvidia.com (PGP Universal service); Tue, 18 Mar 2014 16:47:32 -0700 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Tue, 18 Mar 2014 16:47:32 -0700 Received: from aruns.nvidia.com (172.20.144.16) by hqemhub01.nvidia.com (172.20.150.30) with Microsoft SMTP Server (TLS) id 8.3.327.1; Tue, 18 Mar 2014 16:51:16 -0700 From: Arun Shamanna Lakshmi To: , Date: Tue, 18 Mar 2014 16:51:32 -0700 Message-ID: <1395186692-11735-1-git-send-email-aruns@nvidia.com> X-Mailer: git-send-email 1.7.9.5 X-NVConfidentiality: public MIME-Version: 1.0 Cc: Songhee Baek , Arun Shamanna Lakshmi , alsa-devel@alsa-project.org, tiwai@suse.de, linux-kernel@vger.kernel.org Subject: [alsa-devel] [PATCH] ASoC: Add support for multi register mux X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP Currently soc_enum structure supports only 2 registers (reg, reg2) for kcontrol. However, it is possible to have multiple registers per mux. This change allows us to control these multiple registers. Signed-off-by: Arun Shamanna Lakshmi Signed-off-by: Songhee Baek --- include/sound/soc.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/sound/soc.h b/include/sound/soc.h index 9a00147..ddedfb4 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h @@ -1093,6 +1093,9 @@ struct soc_enum { unsigned int mask; const char * const *texts; const unsigned int *values; + unsigned int *regs; + unsigned int *masks; + unsigned int num_regs; }; /* codec IO */