| Message ID | 1395432521-11055-4-git-send-email-alexandre.belloni@free-electrons.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 03/21/2014 09:08 PM, Alexandre Belloni wrote: > The Berlin BG2Q has two supported PLLs: CPU PLL and System PLL, add those to the > SoC device tree. > > Note that support for the AVPLL is not yet available. Above should not be part of the commit message, no need to resend. I can fix it up. Sebastian > Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> > --- > arch/arm/boot/dts/berlin2q.dtsi | 22 +++++++++++++++------- > 1 file changed, 15 insertions(+), 7 deletions(-) > > diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi > index 07452a7483fa..5925e6a16749 100644 > --- a/arch/arm/boot/dts/berlin2q.dtsi > +++ b/arch/arm/boot/dts/berlin2q.dtsi > @@ -59,16 +59,10 @@ > clock-frequency = <100000000>; > }; > > - cpuclk: cpu-clock { > - compatible = "fixed-clock"; > - #clock-cells = <0>; > - clock-frequency = <1200000000>; > - }; > - > twdclk: twdclk { > compatible = "fixed-factor-clock"; > #clock-cells = <0>; > - clocks = <&cpuclk>; > + clocks = <&cpupll>; > clock-mult = <1>; > clock-div = <3>; > }; > @@ -101,6 +95,20 @@ > #interrupt-cells = <3>; > }; > > + cpupll: cpupll@dd0170 { > + compatible = "marvell,berlin2q-pll"; > + clocks = <&smclk>; > + #clock-cells = <0>; > + reg = <0xdd0170 0x8>; > + }; > + > + syspll: syspll@ea0030 { > + compatible = "marvell,berlin2q-pll"; > + clocks = <&smclk>; > + #clock-cells = <0>; > + reg = <0xea0030 0x8>; > + }; > + > apb@e80000 { > compatible = "simple-bus"; > #address-cells = <1>; >
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi index 07452a7483fa..5925e6a16749 100644 --- a/arch/arm/boot/dts/berlin2q.dtsi +++ b/arch/arm/boot/dts/berlin2q.dtsi @@ -59,16 +59,10 @@ clock-frequency = <100000000>; }; - cpuclk: cpu-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <1200000000>; - }; - twdclk: twdclk { compatible = "fixed-factor-clock"; #clock-cells = <0>; - clocks = <&cpuclk>; + clocks = <&cpupll>; clock-mult = <1>; clock-div = <3>; }; @@ -101,6 +95,20 @@ #interrupt-cells = <3>; }; + cpupll: cpupll@dd0170 { + compatible = "marvell,berlin2q-pll"; + clocks = <&smclk>; + #clock-cells = <0>; + reg = <0xdd0170 0x8>; + }; + + syspll: syspll@ea0030 { + compatible = "marvell,berlin2q-pll"; + clocks = <&smclk>; + #clock-cells = <0>; + reg = <0xea0030 0x8>; + }; + apb@e80000 { compatible = "simple-bus"; #address-cells = <1>;
The Berlin BG2Q has two supported PLLs: CPU PLL and System PLL, add those to the SoC device tree. Note that support for the AVPLL is not yet available. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> --- arch/arm/boot/dts/berlin2q.dtsi | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-)