ASoC: fsl_spdif: Fix wrong OFFSET of STC_SYSCLK_DIV
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Message ID 1397813528-3083-1-git-send-email-Guangyu.Chen@freescale.com
State Accepted
Commit 6ae6698276ca36f37afc2ad38054092021519ad4
Headers show

Commit Message

Nicolin Chen April 18, 2014, 9:32 a.m. UTC
It should use STC_SYSCLK_DIV_OFFSET. Thus fix it.

Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
---
 sound/soc/fsl/fsl_spdif.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Mark Brown April 18, 2014, 2:05 p.m. UTC | #1
On Fri, Apr 18, 2014 at 05:32:08PM +0800, Nicolin Chen wrote:
> It should use STC_SYSCLK_DIV_OFFSET. Thus fix it.

Applied, thanks.

Patch
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diff --git a/sound/soc/fsl/fsl_spdif.h b/sound/soc/fsl/fsl_spdif.h
index b126679..605a10b 100644
--- a/sound/soc/fsl/fsl_spdif.h
+++ b/sound/soc/fsl/fsl_spdif.h
@@ -144,8 +144,8 @@  enum spdif_gainsel {
 
 /* SPDIF Clock register */
 #define STC_SYSCLK_DIV_OFFSET		11
-#define STC_SYSCLK_DIV_MASK		(0x1ff << STC_TXCLK_SRC_OFFSET)
-#define STC_SYSCLK_DIV(x)		((((x) - 1) << STC_TXCLK_DIV_OFFSET) & STC_SYSCLK_DIV_MASK)
+#define STC_SYSCLK_DIV_MASK		(0x1ff << STC_SYSCLK_DIV_OFFSET)
+#define STC_SYSCLK_DIV(x)		((((x) - 1) << STC_SYSCLK_DIV_OFFSET) & STC_SYSCLK_DIV_MASK)
 #define STC_TXCLK_SRC_OFFSET		8
 #define STC_TXCLK_SRC_MASK		(0x7 << STC_TXCLK_SRC_OFFSET)
 #define STC_TXCLK_SRC_SET(x)		((x << STC_TXCLK_SRC_OFFSET) & STC_TXCLK_SRC_MASK)