Message ID | 1405591275-14461-11-git-send-email-michel@daenzer.net (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Like I said at patch 4, this would be okay if the COHERENT flag wasn't set. If you removed the PERSISTENT flag from the conditional, the placement of persistent non-coherent buffers would be driven by the "usage", meaning that you would be able to get any kind of placement you want. Marek On Thu, Jul 17, 2014 at 12:01 PM, Michel Dänzer <michel@daenzer.net> wrote: > From: Michel Dänzer <michel.daenzer@amd.com> > > Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> > --- > src/gallium/drivers/radeon/r600_buffer_common.c | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > > diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c b/src/gallium/drivers/radeon/r600_buffer_common.c > index c8a0723..6f7fa29 100644 > --- a/src/gallium/drivers/radeon/r600_buffer_common.c > +++ b/src/gallium/drivers/radeon/r600_buffer_common.c > @@ -125,12 +125,10 @@ bool r600_init_resource(struct r600_common_screen *rscreen, > break; > } > > - /* Use GTT for all persistent mappings, because they are > - * always cached and coherent. */ > if (res->b.b.target == PIPE_BUFFER && > res->b.b.flags & (PIPE_RESOURCE_FLAG_MAP_PERSISTENT | > PIPE_RESOURCE_FLAG_MAP_COHERENT)) { > - res->domains = RADEON_DOMAIN_GTT; > + res->domains = RADEON_DOMAIN_VRAM; > flags = RADEON_FLAG_GTT_WC; > } > > -- > 2.0.0 > > _______________________________________________ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/mesa-dev
diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c b/src/gallium/drivers/radeon/r600_buffer_common.c index c8a0723..6f7fa29 100644 --- a/src/gallium/drivers/radeon/r600_buffer_common.c +++ b/src/gallium/drivers/radeon/r600_buffer_common.c @@ -125,12 +125,10 @@ bool r600_init_resource(struct r600_common_screen *rscreen, break; } - /* Use GTT for all persistent mappings, because they are - * always cached and coherent. */ if (res->b.b.target == PIPE_BUFFER && res->b.b.flags & (PIPE_RESOURCE_FLAG_MAP_PERSISTENT | PIPE_RESOURCE_FLAG_MAP_COHERENT)) { - res->domains = RADEON_DOMAIN_GTT; + res->domains = RADEON_DOMAIN_VRAM; flags = RADEON_FLAG_GTT_WC; }