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[v2,2/2] drm/i915: fix VDD state tracking after system resume

Message ID 1406725052-31791-2-git-send-email-imre.deak@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Imre Deak July 30, 2014, 12:57 p.m. UTC
Just like during booting the BIOS can leave the VDD bit enabled after
system resume. So apply the same state sanitization there too. This
fixes a problem where after resume the port power domain refcount gets
unbalanced.

Reported-and-tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Daniel Vetter July 30, 2014, 1:41 p.m. UTC | #1
On Wed, Jul 30, 2014 at 03:57:32PM +0300, Imre Deak wrote:
> Just like during booting the BIOS can leave the VDD bit enabled after
> system resume. So apply the same state sanitization there too. This
> fixes a problem where after resume the port power domain refcount gets
> unbalanced.
> 
> Reported-and-tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 1edfd1a..fdb5657 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -12977,6 +12977,12 @@ void intel_modeset_setup_hw_state(struct drm_device *dev,
>  	/* HW state is read out, now we need to sanitize this mess. */
>  	list_for_each_entry(encoder, &dev->mode_config.encoder_list,
>  			    base.head) {
> +		/*
> +		 * Do the following only during resume, since at driver
> +		 * loading it's done early when initializing the encoder.
> +		 */
> +		if (force_restore)
> +			intel_edp_panel_vdd_sanitize(encoder);

This should be put into an encoder->reset callback.
-Daniel

>  		intel_sanitize_encoder(encoder);
>  	}
>  
> -- 
> 1.8.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 1edfd1a..fdb5657 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -12977,6 +12977,12 @@  void intel_modeset_setup_hw_state(struct drm_device *dev,
 	/* HW state is read out, now we need to sanitize this mess. */
 	list_for_each_entry(encoder, &dev->mode_config.encoder_list,
 			    base.head) {
+		/*
+		 * Do the following only during resume, since at driver
+		 * loading it's done early when initializing the encoder.
+		 */
+		if (force_restore)
+			intel_edp_panel_vdd_sanitize(encoder);
 		intel_sanitize_encoder(encoder);
 	}