ASoC: fsl-asrc: Convert to use regmap framework's endianness method.
diff mbox

Message ID 1408352215-12014-1-git-send-email-Li.Xiubo@freescale.com
State New, archived
Headers show

Commit Message

Xiubo Li Aug. 18, 2014, 8:56 a.m. UTC
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
---

This is depended on the following regmap framework patches, which have
just been merged into linux-next tree:

https://lkml.org/lkml/2014/7/15/6
https://lkml.org/lkml/2014/7/15/5
https://lkml.org/lkml/2014/7/15/7






 Documentation/devicetree/bindings/sound/fsl,asrc.txt | 10 +++++++---
 sound/soc/fsl/fsl_asrc.c                             |  6 +-----
 2 files changed, 8 insertions(+), 8 deletions(-)

Comments

Mark Rutland Aug. 18, 2014, 9:51 a.m. UTC | #1
On Mon, Aug 18, 2014 at 09:56:55AM +0100, Xiubo Li wrote:
> Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
> ---
> 
> This is depended on the following regmap framework patches, which have
> just been merged into linux-next tree:
> 
> https://lkml.org/lkml/2014/7/15/6
> https://lkml.org/lkml/2014/7/15/5
> https://lkml.org/lkml/2014/7/15/7
> 
> 
> 
> 
> 
> 
>  Documentation/devicetree/bindings/sound/fsl,asrc.txt | 10 +++++++---
>  sound/soc/fsl/fsl_asrc.c                             |  6 +-----
>  2 files changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/sound/fsl,asrc.txt b/Documentation/devicetree/bindings/sound/fsl,asrc.txt
> index b93362a..791f372 100644
> --- a/Documentation/devicetree/bindings/sound/fsl,asrc.txt
> +++ b/Documentation/devicetree/bindings/sound/fsl,asrc.txt
> @@ -26,9 +26,12 @@ Required properties:
>  	"ipg"		  Peripheral clock to driver module.
>  	"asrck_<0-f>"	  Clock sources for input and output clock.
>  
> -   - big-endian		: If this property is absent, the little endian mode
> -			  will be in use as default. Otherwise, the big endian
> -			  mode will be in use for all the device registers.
> +   - big-endian		: If this property is absent, the native endian mode
> +			  (same with CPU) will be in use as default. Otherwise,
> +			  the big endian mode will be in use for all the device
> +			  registers.
> +			  See Documentation/devicetree/bindings/regmap/regmap.txt
> +			  for more detail.

Why does this have to change the semantics of the DT binding?

Mark.

>  
>     - fsl,asrc-rate	: Defines a mutual sample rate used by DPCM Back Ends.
>  
> @@ -56,5 +59,6 @@ asrc: asrc@02034000 {
>  		"txa", "txb", "txc";
>  	fsl,asrc-rate  = <48000>;
>  	fsl,asrc-width = <16>;
> +	big-endian;
>  	status = "okay";
>  };
> diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c
> index 8221104..3b14531 100644
> --- a/sound/soc/fsl/fsl_asrc.c
> +++ b/sound/soc/fsl/fsl_asrc.c
> @@ -684,7 +684,7 @@ static bool fsl_asrc_writeable_reg(struct device *dev, unsigned int reg)
>  	}
>  }
>  
> -static struct regmap_config fsl_asrc_regmap_config = {
> +static const struct regmap_config fsl_asrc_regmap_config = {
>  	.reg_bits = 32,
>  	.reg_stride = 4,
>  	.val_bits = 32,
> @@ -802,10 +802,6 @@ static int fsl_asrc_probe(struct platform_device *pdev)
>  
>  	asrc_priv->paddr = res->start;
>  
> -	/* Register regmap and let it prepare core clock */
> -	if (of_property_read_bool(np, "big-endian"))
> -		fsl_asrc_regmap_config.val_format_endian = REGMAP_ENDIAN_BIG;
> -
>  	asrc_priv->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "mem", regs,
>  						      &fsl_asrc_regmap_config);
>  	if (IS_ERR(asrc_priv->regmap)) {
> -- 
> 1.8.5
> 
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>
Xiubo Li Aug. 18, 2014, 12:03 p.m. UTC | #2
>>  Documentation/devicetree/bindings/sound/fsl,asrc.txt | 10 +++++++---
>>  sound/soc/fsl/fsl_asrc.c                             |  6 +-----
>>  2 files changed, 8 insertions(+), 8 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/sound/fsl,asrc.txt b/Documentation/devicetree/bindings/sound/fsl,asrc.txt
>> index b93362a..791f372 100644
>> --- a/Documentation/devicetree/bindings/sound/fsl,asrc.txt
>> +++ b/Documentation/devicetree/bindings/sound/fsl,asrc.txt
>> @@ -26,9 +26,12 @@ Required properties:
>>       "ipg"             Peripheral clock to driver module.
>>       "asrck_<0-f>"     Clock sources for input and output clock.
>>
>> -   - big-endian              : If this property is absent, the little endian mode
>>-                       will be in use as default. Otherwise, the big endian
>> -                       mode will be in use for all the device registers.
>> +   - big-endian              : If this property is absent, the native endian mode
>> +                       (same with CPU) will be in use as default. Otherwise,
>> +                       the big endian mode will be in use for all the device
>> +                       registers.
>> +                       See Documentation/devicetree/bindings/regmap/regmap.txt
>> +                       for more detail.
>
>Why does this have to change the semantics of the DT binding?
>

I'm thinking that maybe in the late fulture, this device will be applied to some PowerPC SoC, 
from the regmap framework code, we can see that the 'big-endian' property could be ignored.

So,in this case,  if it is absent, the default endian mode should be used as defualt or native as 
the regmap framework said.

Thanks,

BRs
Xiubo



>
>
>Mark.
>
>>
>>     - fsl,asrc-rate   : Defines a mutual sample rate used by DPCM Back Ends.
>>
Mark Rutland Aug. 18, 2014, 12:21 p.m. UTC | #3
On Mon, Aug 18, 2014 at 01:03:14PM +0100, Li.Xiubo@freescale.com wrote:
> >>  Documentation/devicetree/bindings/sound/fsl,asrc.txt | 10 +++++++---
> >>  sound/soc/fsl/fsl_asrc.c                             |  6 +-----
> >>  2 files changed, 8 insertions(+), 8 deletions(-)
> >>
> >> diff --git a/Documentation/devicetree/bindings/sound/fsl,asrc.txt b/Documentation/devicetree/bindings/sound/fsl,asrc.txt
> >> index b93362a..791f372 100644
> >> --- a/Documentation/devicetree/bindings/sound/fsl,asrc.txt
> >> +++ b/Documentation/devicetree/bindings/sound/fsl,asrc.txt
> >> @@ -26,9 +26,12 @@ Required properties:
> >>       "ipg"             Peripheral clock to driver module.
> >>       "asrck_<0-f>"     Clock sources for input and output clock.
> >>
> >> -   - big-endian              : If this property is absent, the little endian mode
> >>-                       will be in use as default. Otherwise, the big endian
> >> -                       mode will be in use for all the device registers.
> >> +   - big-endian              : If this property is absent, the native endian mode
> >> +                       (same with CPU) will be in use as default. Otherwise,
> >> +                       the big endian mode will be in use for all the device
> >> +                       registers.
> >> +                       See Documentation/devicetree/bindings/regmap/regmap.txt
> >> +                       for more detail.
> >
> >Why does this have to change the semantics of the DT binding?
> >
> 
> I'm thinking that maybe in the late fulture, this device will be
> applied to some PowerPC SoC, from the regmap framework code, we can
> see that the 'big-endian' property could be ignored.
> 
> So,in this case,  if it is absent, the default endian mode should be
> used as defualt or native as the regmap framework said.

As I have mentioned in the past w.r.t. endianness bindings, there is no
such thing as a "default endianness" or "native endianness".

PowerPC and ARM can be Bi-endian, configured by the kernel.

The hardware's registers have a fixed endianness regardless of this
runtime configuration.

So describe that fixed property, as that does not vary with kernel
configuration (and is therefore a property of the HW rather than the
combination of HW + kernel).

Thanks,
Mark.
Xiubo Li Aug. 18, 2014, 12:43 p.m. UTC | #4
[...]
>> >Why does this have to change the semantics of the DT binding?
>> >
>>
>> I'm thinking that maybe in the late fulture, this device will be
>> applied to some PowerPC SoC, from the regmap framework code, we can
>> see that the 'big-endian' property could be ignored.
>>
>> So,in this case,  if it is absent, the default endian mode should be
>> used as defualt or native as the regmap framework said.
>
> As I have mentioned in the past w.r.t. endianness bindings, there is no
> such thing as a "default endianness" or "native endianness".
>
> PowerPC and ARM can be Bi-endian, configured by the kernel.
>
> The hardware's registers have a fixed endianness regardless of this
> runtime configuration.
>
> So describe that fixed property, as that does not vary with kernel
> configuration (and is therefore a property of the HW rather than the
> combination of HW + kernel).
>

Yeah, okay.

I'll remove the document binding's modification.



> Thanks,
> Mark.
Varka Bhadram Aug. 18, 2014, 3:24 p.m. UTC | #5
On Monday 18 August 2014 02:26 PM, Xiubo Li wrote:
> Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
> ---
>
> This is depended on the following regmap framework patches, which have
> just been merged into linux-next tree:
>
> https://lkml.org/lkml/2014/7/15/6
> https://lkml.org/lkml/2014/7/15/5
> https://lkml.org/lkml/2014/7/15/7
>
>
>
>
>
>
>   Documentation/devicetree/bindings/sound/fsl,asrc.txt | 10 +++++++---
>   sound/soc/fsl/fsl_asrc.c                             |  6 +-----
>   2 files changed, 8 insertions(+), 8 deletions(-)
>
Reviewed-by: Varka Bhadram <varkabhadram@gmail.com>


--
Regards,
Varka Bhadram.

Patch
diff mbox

diff --git a/Documentation/devicetree/bindings/sound/fsl,asrc.txt b/Documentation/devicetree/bindings/sound/fsl,asrc.txt
index b93362a..791f372 100644
--- a/Documentation/devicetree/bindings/sound/fsl,asrc.txt
+++ b/Documentation/devicetree/bindings/sound/fsl,asrc.txt
@@ -26,9 +26,12 @@  Required properties:
 	"ipg"		  Peripheral clock to driver module.
 	"asrck_<0-f>"	  Clock sources for input and output clock.
 
-   - big-endian		: If this property is absent, the little endian mode
-			  will be in use as default. Otherwise, the big endian
-			  mode will be in use for all the device registers.
+   - big-endian		: If this property is absent, the native endian mode
+			  (same with CPU) will be in use as default. Otherwise,
+			  the big endian mode will be in use for all the device
+			  registers.
+			  See Documentation/devicetree/bindings/regmap/regmap.txt
+			  for more detail.
 
    - fsl,asrc-rate	: Defines a mutual sample rate used by DPCM Back Ends.
 
@@ -56,5 +59,6 @@  asrc: asrc@02034000 {
 		"txa", "txb", "txc";
 	fsl,asrc-rate  = <48000>;
 	fsl,asrc-width = <16>;
+	big-endian;
 	status = "okay";
 };
diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c
index 8221104..3b14531 100644
--- a/sound/soc/fsl/fsl_asrc.c
+++ b/sound/soc/fsl/fsl_asrc.c
@@ -684,7 +684,7 @@  static bool fsl_asrc_writeable_reg(struct device *dev, unsigned int reg)
 	}
 }
 
-static struct regmap_config fsl_asrc_regmap_config = {
+static const struct regmap_config fsl_asrc_regmap_config = {
 	.reg_bits = 32,
 	.reg_stride = 4,
 	.val_bits = 32,
@@ -802,10 +802,6 @@  static int fsl_asrc_probe(struct platform_device *pdev)
 
 	asrc_priv->paddr = res->start;
 
-	/* Register regmap and let it prepare core clock */
-	if (of_property_read_bool(np, "big-endian"))
-		fsl_asrc_regmap_config.val_format_endian = REGMAP_ENDIAN_BIG;
-
 	asrc_priv->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "mem", regs,
 						      &fsl_asrc_regmap_config);
 	if (IS_ERR(asrc_priv->regmap)) {