[v2,5/7] arm64: dts: Add initial device tree support for EXYNOS7
diff mbox

Message ID 1409672143-8574-6-git-send-email-ch.naveen@samsung.com
State New, archived
Headers show

Commit Message

Naveen Krishna Chatradhi Sept. 2, 2014, 3:35 p.m. UTC
Add initial device tree nodes for EXYNOS7 SoC and board dts file
to support Espresso board based on Exynos7 SoC.

Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
---
 arch/arm64/boot/dts/Makefile                    |    1 +
 arch/arm64/boot/dts/exynos/exynos7-espresso.dts |   31 +++++
 arch/arm64/boot/dts/exynos/exynos7.dtsi         |  168 +++++++++++++++++++++++
 3 files changed, 200 insertions(+)
 create mode 100644 arch/arm64/boot/dts/exynos/exynos7-espresso.dts
 create mode 100644 arch/arm64/boot/dts/exynos/exynos7.dtsi

Comments

Kim Kukjin Sept. 3, 2014, 4:15 p.m. UTC | #1
Naveen Krishna Chatradhi wrote:
> 
> Add initial device tree nodes for EXYNOS7 SoC and board dts file
> to support Espresso board based on Exynos7 SoC.
> 
> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Catalin Marinas <catalin.marinas@arm.com>

NAK.

There are several exynos7 SoCs which cannot be supported with one dt file. I
mean just one exynos7 cannot represent all of exynos7 SoCs... 

> ---
>  arch/arm64/boot/dts/Makefile                    |    1 +
>  arch/arm64/boot/dts/exynos/exynos7-espresso.dts |   31 +++++
>  arch/arm64/boot/dts/exynos/exynos7.dtsi         |  168 +++++++++++++++++++++++
>  3 files changed, 200 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/exynos/exynos7-espresso.dts
>  create mode 100644 arch/arm64/boot/dts/exynos/exynos7.dtsi
> 
> diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
> index c52bdb0..a3bc18a 100644
> --- a/arch/arm64/boot/dts/Makefile
> +++ b/arch/arm64/boot/dts/Makefile
> @@ -1,3 +1,4 @@
> +dtb-$(CONFIG_ARCH_EXYNOS7) += exynos/exynos7-espresso.dtb
>  dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb foundation-v8.dtb
>  dtb-$(CONFIG_ARCH_XGENE) += apm-mustang.dtb
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts b/arch/arm64/boot/dts/exynos/exynos7-
> espresso.dts
> new file mode 100644
> index 0000000..f6a8879
> --- /dev/null
> +++ b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
> @@ -0,0 +1,31 @@
> +/*
> + * SAMSUNG Exynos7 Espresso board device tree source
> + *
> + * Copyright (c) 2014 Samsung Electronics Co., Ltd.
> + *		http://www.samsung.com
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +/dts-v1/;
> +#include "exynos7.dtsi"
> +
> +/ {
> +	model = "Samsung Exynos7 Espresso board based on EXYNOS7";
> +	compatible = "samsung,exynos7-espresso", "samsung,exynos7";
> +
> +	chosen {
> +		linux,stdout-path = &serial_2;

Well...

> +	};
> +
> +	memory@40000000 {
> +		device_type = "memory";
> +		reg = <0x0 0x40000000 0x0 0xC0000000>;

The base address of system memory is depending on each board, actually some of
them are 0x20000000.

> +	};
> +};
> +
> +&serial_2 {
> +	status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
> new file mode 100644
> index 0000000..e593af55
> --- /dev/null
> +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
> @@ -0,0 +1,168 @@
> +/*
> + * SAMSUNG EXYNOS7 SoC device tree source
> + *
> + * Copyright (c) 2014 Samsung Electronics Co., Ltd.
> + *		http://www.samsung.com
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <dt-bindings/clock/exynos7-clk.h>
> +
> +/ {
> +	compatible = "samsung,exynos7";
> +	interrupt-parent = <&gic>;
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +
> +	aliases {
> +		serial0 = &serial_0;
> +		serial1 = &serial_1;
> +		serial2 = &serial_2;
> +		serial3 = &serial_3;

There are exynos7 SoC is having 3 serial IPs...

> +	};
> +
> +	cpus {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		cpu@0 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a57", "arm,armv8";
> +			enable-method = "psci";
> +			reg = <0x0>;
> +		};
> +
> +		cpu@1 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a57", "arm,armv8";
> +			enable-method = "psci";
> +			reg = <0x1>;
> +		};
> +
> +		cpu@2 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a57", "arm,armv8";
> +			enable-method = "psci";
> +			reg = <0x2>;
> +		};
> +
> +		cpu@3 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a57", "arm,armv8";
> +			enable-method = "psci";
> +			reg = <0x3>;
> +		};
> +	};

Naveen, please don't assume all of exynos7 SoCs are having quad a57s...

> +
> +	psci {
> +		compatible = "arm,psci-0.2";
> +		method = "smc";
> +	};
> +
> +	soc: soc {
> +		compatible = "simple-bus";
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges = <0 0 0 0x18000000>;
> +
> +		chipid@10000000 {
> +			compatible = "samsung,exynos4210-chipid";
> +			reg = <0x10000000 0x100>;
> +		};
> +
> +		fin_pll: xxti {
> +			compatible = "fixed-clock";
> +			clock-frequency = <24000000>;

It's wrong on some exynos7 SoCs...

> +			clock-output-names = "fin_pll";
> +			#clock-cells = <0>;
> +		};
> +

Unfortunately the addresses are different on each exynos7 SoCs...

> +		gic: interrupt-controller@11001000 {
> +			compatible = "arm,gic-400";
> +			#interrupt-cells = <3>;
> +			#address-cells = <0>;
> +			interrupt-controller;
> +			reg =	<0x11001000 0x1000>,
> +				<0x11002000 0x1000>,
> +				<0x11004000 0x2000>,
> +				<0x11006000 0x2000>;
> +		};
> +
> +		clock_topc: clock-controller@10570000 {
> +			compatible = "samsung,exynos7-clock-topc";
> +			reg = <0x10570000 0x10000>;
> +			#clock-cells = <1>;
> +		};
> +
> +		clock_top0: clock-controller@105d0000 {
> +			compatible = "samsung,exynos7-clock-top0";
> +			reg = <0x105d0000 0xb000>;
> +			#clock-cells = <1>;
> +		};
> +
> +		clock_peric0: clock-controller@13610000 {
> +			compatible = "samsung,exynos7-clock-peric0";
> +			reg = <0x13610000 0xd00>;
> +			#clock-cells = <1>;
> +		};
> +
> +		clock_peric1: clock-controller@14C80000 {
> +			compatible = "samsung,exynos7-clock-peric1";
> +			reg = <0x14c80000 0xd00>;
> +			#clock-cells = <1>;
> +		};
> +
> +		clock_peris: clock-controller@10040000 {
> +			compatible = "samsung,exynos7-clock-peris";
> +			reg = <0x10040000 0xd00>;
> +			#clock-cells = <1>;
> +		};
> +
> +		serial_0: serial@13630000 {
> +			compatible = "samsung,exynos4210-uart";
> +			reg = <0x13630000 0x100>;
> +			interrupts = <0 440 0>;
> +			clocks = <&clock_peric0 PCLK_UART0>, <&clock_peric0 SCLK_UART0>;
> +			clock-names = "uart", "clk_uart_baud0";
> +			status = "disabled";
> +		};
> +
> +		serial_1: serial@14c20000 {
> +			compatible = "samsung,exynos4210-uart";
> +			reg = <0x14c20000 0x100>;
> +			interrupts = <0 456 0>;
> +			clocks = <&clock_peric1 PCLK_UART1>, <&clock_peric1 SCLK_UART1>;
> +			clock-names = "uart", "clk_uart_baud0";
> +			status = "disabled";
> +		};
> +
> +		serial_2: serial@14c30000 {
> +			compatible = "samsung,exynos4210-uart";
> +			reg = <0x14c30000 0x100>;
> +			interrupts = <0 457 0>;
> +			clocks = <&clock_peric1 PCLK_UART2>, <&clock_peric1 SCLK_UART2>;
> +			clock-names = "uart", "clk_uart_baud0";
> +			status = "disabled";
> +		};
> +
> +		serial_3: serial@14c40000 {
> +			compatible = "samsung,exynos4210-uart";
> +			reg = <0x14c40000 0x100>;
> +			interrupts = <0 458 0>;
> +			clocks = <&clock_peric1 PCLK_UART3>, <&clock_peric1 SCLK_UART3>;
> +			clock-names = "uart", "clk_uart_baud0";
> +			status = "disabled";
> +		};
> +
> +		timer {
> +			compatible = "arm,armv8-timer";
> +			interrupts = <1 13 0xff01>,
> +				     <1 14 0xff01>,
> +				     <1 11 0xff01>,
> +				     <1 10 0xff01>;
> +		};
> +	};
> +};
> --
> 1.7.9.5

So this is not acceptable...

- Kukjin

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Arnd Bergmann Sept. 3, 2014, 4:22 p.m. UTC | #2
On Thursday 04 September 2014 01:15:20 Kukjin Kim wrote:
> Naveen Krishna Chatradhi wrote:
>
> > diff --git a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts b/arch/arm64/boot/dts/exynos/exynos7-
> > espresso.dts
> > new file mode 100644
> > index 0000000..f6a8879
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
> > @@ -0,0 +1,31 @@
> > +/*
> > + * SAMSUNG Exynos7 Espresso board device tree source
> > + *
> > + * Copyright (c) 2014 Samsung Electronics Co., Ltd.
> > + *		http://www.samsung.com
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License version 2 as
> > + * published by the Free Software Foundation.
> > +*/
> > +
> > +/dts-v1/;
> > +#include "exynos7.dtsi"
> > +
> > +/ {
> > +	model = "Samsung Exynos7 Espresso board based on EXYNOS7";
> > +	compatible = "samsung,exynos7-espresso", "samsung,exynos7";
> > +
> > +	chosen {
> > +		linux,stdout-path = &serial_2;
> 
> Well...
> 
> > +	};
> > +
> > +	memory@40000000 {
> > +		device_type = "memory";
> > +		reg = <0x0 0x40000000 0x0 0xC0000000>;
> 
> The base address of system memory is depending on each board, actually some of
> them are 0x20000000.

This is the board specific file, so it seems ok.

> > +#include <dt-bindings/clock/exynos7-clk.h>
> > +
> > +/ {
> > +	compatible = "samsung,exynos7";
> > +	interrupt-parent = <&gic>;
> > +	#address-cells = <2>;
> > +	#size-cells = <2>;
> > +
> > +	aliases {
> > +		serial0 = &serial_0;
> > +		serial1 = &serial_1;
> > +		serial2 = &serial_2;
> > +		serial3 = &serial_3;
> 
> There are exynos7 SoC is having 3 serial IPs...

These aliases should just go into the board file as well, and
since it seems to have only one uart, the best way is to list
that as serial0:

	serial0 = &serial_2;

> > +
> > +	psci {
> > +		compatible = "arm,psci-0.2";
> > +		method = "smc";
> > +	};
> > +
> > +	soc: soc {
> > +		compatible = "simple-bus";
> > +		#address-cells = <1>;
> > +		#size-cells = <1>;
> > +		ranges = <0 0 0 0x18000000>;
> > +
> > +		chipid@10000000 {
> > +			compatible = "samsung,exynos4210-chipid";
> > +			reg = <0x10000000 0x100>;
> > +		};
> > +
> > +		fin_pll: xxti {
> > +			compatible = "fixed-clock";
> > +			clock-frequency = <24000000>;
> 
> It's wrong on some exynos7 SoCs...
> 

Is this an external clock input? If so, the frequency should
also go into the board file, otherwise into the soc-specific
one.

	Arnd
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Kim Kukjin Sept. 3, 2014, 4:31 p.m. UTC | #3
Arnd Bergmann wrote:
> 
Hi, Arnd

> On Thursday 04 September 2014 01:15:20 Kukjin Kim wrote:
> > Naveen Krishna Chatradhi wrote:
> >
> > > diff --git a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts b/arch/arm64/boot/dts/exynos/exynos7-
> > > espresso.dts
> > > new file mode 100644
> > > index 0000000..f6a8879
> > > --- /dev/null
> > > +++ b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
> > > @@ -0,0 +1,31 @@
> > > +/*
> > > + * SAMSUNG Exynos7 Espresso board device tree source
> > > + *
> > > + * Copyright (c) 2014 Samsung Electronics Co., Ltd.
> > > + *		http://www.samsung.com
> > > + *
> > > + * This program is free software; you can redistribute it and/or modify
> > > + * it under the terms of the GNU General Public License version 2 as
> > > + * published by the Free Software Foundation.
> > > +*/
> > > +
> > > +/dts-v1/;
> > > +#include "exynos7.dtsi"
> > > +
> > > +/ {
> > > +	model = "Samsung Exynos7 Espresso board based on EXYNOS7";
> > > +	compatible = "samsung,exynos7-espresso", "samsung,exynos7";
> > > +
> > > +	chosen {
> > > +		linux,stdout-path = &serial_2;
> >
> > Well...
> >
> > > +	};
> > > +
> > > +	memory@40000000 {
> > > +		device_type = "memory";
> > > +		reg = <0x0 0x40000000 0x0 0xC0000000>;
> >
> > The base address of system memory is depending on each board, actually some of
> > them are 0x20000000.
> 
> This is the board specific file, so it seems ok.
> 
I mean there are many espresso boards are having different exynos7 SoC. I mean
exynos7-espresso cannot represent all of espresso boards.

- Kukjin

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Arnd Bergmann Sept. 3, 2014, 6:28 p.m. UTC | #4
On Thursday 04 September 2014 01:31:21 Kukjin Kim wrote:
> > This is the board specific file, so it seems ok.
> > 
> I mean there are many espresso boards are having different exynos7
> SoC. I mean exynos7-espresso cannot represent all of espresso boards.
> 

Ah, I see, that makes sense.

We definitely need a top-level .dts file for each board that is different
in a nondiscoverable way then.

If the mmc settings and possibly some other nodes (to be added later)
are common across them, those can be in a board specific .dtsi file.

For the memory node, I would actually expect that to be filled by
the boot loader, so we could leave it out entirely. The same applies
to the command line: the parts that are in there at the moment (
"console=ttySAC2,115200n8 root=/dev/ram0 ramdisk=16384 initrd=0x42000000,16M")
clearly don't belong into a generic dts file and none of them should be
set that way.

For the initial version, that would mean that the file comes down to having
as its only contents

/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "exynos7123.dtsi"
#include "exynos7-espresso.dtsi" // for the mmc nodes

/ {
       model = "Samsung ESPRESSO board based on EXYNOS7123";
       compatible = "samsung,espresso", "samsung,exynos7123", "samsung,exynos7";
};

One more thing I just noticed is the GPL statement in the dts files.
Can we please change that to a permissive license in order to allow
including it in non-GPL boot loaders and operating systems?

Dual GPL+MIT or GPL+BSD would make most sense here.

	Arnd
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kgene@kernel.org Sept. 9, 2014, 3:06 a.m. UTC | #5
Arnd Bergmann wrote:
> 
> On Thursday 04 September 2014 01:31:21 Kukjin Kim wrote:
> > > This is the board specific file, so it seems ok.
> > >
> > I mean there are many espresso boards are having different exynos7
> > SoC. I mean exynos7-espresso cannot represent all of espresso boards.
> >
> 
> Ah, I see, that makes sense.
> 
> We definitely need a top-level .dts file for each board that is different
> in a nondiscoverable way then.
> 
Agreed.

And one more, at this moment just using exynos7 would be nice to us then if
required, we could add any specific properties later.

> If the mmc settings and possibly some other nodes (to be added later)
> are common across them, those can be in a board specific .dtsi file.
> 
Yes, right.

> For the memory node, I would actually expect that to be filled by
> the boot loader, so we could leave it out entirely. The same applies
> to the command line: the parts that are in there at the moment (
> "console=ttySAC2,115200n8 root=/dev/ram0 ramdisk=16384 initrd=0x42000000,16M")
> clearly don't belong into a generic dts file and none of them should be
> set that way.
> 
Hmm...yeah we need to use proper boot-loader but I think kernel needs having
default memory property if boot loader doesn't have anything?

> For the initial version, that would mean that the file comes down to having
> as its only contents
> 
> /dts-v1/;
> #include <dt-bindings/gpio/gpio.h>
> #include "exynos7123.dtsi"
> #include "exynos7-espresso.dtsi" // for the mmc nodes
> 
> / {
>        model = "Samsung ESPRESSO board based on EXYNOS7123";
>        compatible = "samsung,espresso", "samsung,exynos7123", "samsung,exynos7";
> };
> 
> One more thing I just noticed is the GPL statement in the dts files.
> Can we please change that to a permissive license in order to allow
> including it in non-GPL boot loaders and operating systems?
> 
> Dual GPL+MIT or GPL+BSD would make most sense here.
> 
I need to check about that with license guy in my team ;)

Naveen, I'll have a look at the patch again.

Thanks,
Kukjin

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kgene@kernel.org Sept. 9, 2014, 3:28 a.m. UTC | #6
Naveen Krishna Chatradhi wrote:
> 
> Add initial device tree nodes for EXYNOS7 SoC and board dts file
> to support Espresso board based on Exynos7 SoC.
> 
> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> ---
>  arch/arm64/boot/dts/Makefile                    |    1 +
>  arch/arm64/boot/dts/exynos/exynos7-espresso.dts |   31 +++++
>  arch/arm64/boot/dts/exynos/exynos7.dtsi         |  168 +++++++++++++++++++++++
>  3 files changed, 200 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/exynos/exynos7-espresso.dts
>  create mode 100644 arch/arm64/boot/dts/exynos/exynos7.dtsi

[...]

> diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
> new file mode 100644
> index 0000000..e593af55
> --- /dev/null
> +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
> @@ -0,0 +1,168 @@
> +/*
> + * SAMSUNG EXYNOS7 SoC device tree source
> + *
> + * Copyright (c) 2014 Samsung Electronics Co., Ltd.
> + *		http://www.samsung.com
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <dt-bindings/clock/exynos7-clk.h>
> +
> +/ {
> +	compatible = "samsung,exynos7";
> +	interrupt-parent = <&gic>;
> +	#address-cells = <2>;

+	#address-cells = <1>; ?

Hmm...I can't see any 64-bit address here.

> +	#size-cells = <2>;
> +

[...]

> +
> +	soc: soc {
> +		compatible = "simple-bus";
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges = <0 0 0 0x18000000>;
> +
> +		chipid@10000000 {
> +			compatible = "samsung,exynos4210-chipid";
> +			reg = <0x10000000 0x100>;
> +		};

Maybe this is not required? There is no check chipid in arm/arm64.

[...]

> +		timer {
> +			compatible = "arm,armv8-timer";
> +			interrupts = <1 13 0xff01>,
> +				     <1 14 0xff01>,
> +				     <1 11 0xff01>,
> +				     <1 10 0xff01>;

clock-frequency ?

[...]

- Kukjin

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Naveen Krishna Ch Sept. 11, 2014, 8:42 a.m. UTC | #7
On 9 September 2014 08:58,  <kgene@kernel.org> wrote:
> Naveen Krishna Chatradhi wrote:
>>
>> Add initial device tree nodes for EXYNOS7 SoC and board dts file
>> to support Espresso board based on Exynos7 SoC.
>>
>> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
>> Cc: Rob Herring <robh@kernel.org>
>> Cc: Catalin Marinas <catalin.marinas@arm.com>
>> ---
>>  arch/arm64/boot/dts/Makefile                    |    1 +
>>  arch/arm64/boot/dts/exynos/exynos7-espresso.dts |   31 +++++
>>  arch/arm64/boot/dts/exynos/exynos7.dtsi         |  168 +++++++++++++++++++++++
>>  3 files changed, 200 insertions(+)
>>  create mode 100644 arch/arm64/boot/dts/exynos/exynos7-espresso.dts
>>  create mode 100644 arch/arm64/boot/dts/exynos/exynos7.dtsi
>
> [...]
>
>> diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
>> new file mode 100644
>> index 0000000..e593af55
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
>> @@ -0,0 +1,168 @@
>> +/*
>> + * SAMSUNG EXYNOS7 SoC device tree source
>> + *
>> + * Copyright (c) 2014 Samsung Electronics Co., Ltd.
>> + *           http://www.samsung.com
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#include <dt-bindings/clock/exynos7-clk.h>
>> +
>> +/ {
>> +     compatible = "samsung,exynos7";
>> +     interrupt-parent = <&gic>;
>> +     #address-cells = <2>;
>
> +       #address-cells = <1>; ?
>
> Hmm...I can't see any 64-bit address here.

All the SoC peripherals have been put into the soc node and ranges
property in that node is used to convert 64-bit to 32-bit addresses.
But since this is a 64-bit SoC, we use #address-cells as 2.

>
>> +     #size-cells = <2>;
>> +
>
> [...]
>
>> +
>> +     soc: soc {
>> +             compatible = "simple-bus";
>> +             #address-cells = <1>;
>> +             #size-cells = <1>;
>> +             ranges = <0 0 0 0x18000000>;
>> +
>> +             chipid@10000000 {
>> +                     compatible = "samsung,exynos4210-chipid";
>> +                     reg = <0x10000000 0x100>;
>> +             };
>
> Maybe this is not required? There is no check chipid in arm/arm64.

This is only describing the hardware and it does not depend on linux
using this information. And support for chip id can be used later for
64-bit Exynos platforms as well.

>
> [...]
>
>> +             timer {
>> +                     compatible = "arm,armv8-timer";
>> +                     interrupts = <1 13 0xff01>,
>> +                                  <1 14 0xff01>,
>> +                                  <1 11 0xff01>,
>> +                                  <1 10 0xff01>;
>
> clock-frequency ?

That is programmed by the bootloader / firmware.

>
> [...]
>
> - Kukjin
>

Thanks,

Patch
diff mbox

diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index c52bdb0..a3bc18a 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -1,3 +1,4 @@ 
+dtb-$(CONFIG_ARCH_EXYNOS7) += exynos/exynos7-espresso.dtb
 dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb foundation-v8.dtb
 dtb-$(CONFIG_ARCH_XGENE) += apm-mustang.dtb
 
diff --git a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
new file mode 100644
index 0000000..f6a8879
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
@@ -0,0 +1,31 @@ 
+/*
+ * SAMSUNG Exynos7 Espresso board device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+#include "exynos7.dtsi"
+
+/ {
+	model = "Samsung Exynos7 Espresso board based on EXYNOS7";
+	compatible = "samsung,exynos7-espresso", "samsung,exynos7";
+
+	chosen {
+		linux,stdout-path = &serial_2;
+	};
+
+	memory@40000000 {
+		device_type = "memory";
+		reg = <0x0 0x40000000 0x0 0xC0000000>;
+	};
+};
+
+&serial_2 {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
new file mode 100644
index 0000000..e593af55
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -0,0 +1,168 @@ 
+/*
+ * SAMSUNG EXYNOS7 SoC device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <dt-bindings/clock/exynos7-clk.h>
+
+/ {
+	compatible = "samsung,exynos7";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		serial0 = &serial_0;
+		serial1 = &serial_1;
+		serial2 = &serial_2;
+		serial3 = &serial_3;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a57", "arm,armv8";
+			enable-method = "psci";
+			reg = <0x0>;
+		};
+
+		cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a57", "arm,armv8";
+			enable-method = "psci";
+			reg = <0x1>;
+		};
+
+		cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a57", "arm,armv8";
+			enable-method = "psci";
+			reg = <0x2>;
+		};
+
+		cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a57", "arm,armv8";
+			enable-method = "psci";
+			reg = <0x3>;
+		};
+	};
+
+	psci {
+		compatible = "arm,psci-0.2";
+		method = "smc";
+	};
+
+	soc: soc {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0 0x18000000>;
+
+		chipid@10000000 {
+			compatible = "samsung,exynos4210-chipid";
+			reg = <0x10000000 0x100>;
+		};
+
+		fin_pll: xxti {
+			compatible = "fixed-clock";
+			clock-frequency = <24000000>;
+			clock-output-names = "fin_pll";
+			#clock-cells = <0>;
+		};
+
+		gic: interrupt-controller@11001000 {
+			compatible = "arm,gic-400";
+			#interrupt-cells = <3>;
+			#address-cells = <0>;
+			interrupt-controller;
+			reg =	<0x11001000 0x1000>,
+				<0x11002000 0x1000>,
+				<0x11004000 0x2000>,
+				<0x11006000 0x2000>;
+		};
+
+		clock_topc: clock-controller@10570000 {
+			compatible = "samsung,exynos7-clock-topc";
+			reg = <0x10570000 0x10000>;
+			#clock-cells = <1>;
+		};
+
+		clock_top0: clock-controller@105d0000 {
+			compatible = "samsung,exynos7-clock-top0";
+			reg = <0x105d0000 0xb000>;
+			#clock-cells = <1>;
+		};
+
+		clock_peric0: clock-controller@13610000 {
+			compatible = "samsung,exynos7-clock-peric0";
+			reg = <0x13610000 0xd00>;
+			#clock-cells = <1>;
+		};
+
+		clock_peric1: clock-controller@14C80000 {
+			compatible = "samsung,exynos7-clock-peric1";
+			reg = <0x14c80000 0xd00>;
+			#clock-cells = <1>;
+		};
+
+		clock_peris: clock-controller@10040000 {
+			compatible = "samsung,exynos7-clock-peris";
+			reg = <0x10040000 0xd00>;
+			#clock-cells = <1>;
+		};
+
+		serial_0: serial@13630000 {
+			compatible = "samsung,exynos4210-uart";
+			reg = <0x13630000 0x100>;
+			interrupts = <0 440 0>;
+			clocks = <&clock_peric0 PCLK_UART0>, <&clock_peric0 SCLK_UART0>;
+			clock-names = "uart", "clk_uart_baud0";
+			status = "disabled";
+		};
+
+		serial_1: serial@14c20000 {
+			compatible = "samsung,exynos4210-uart";
+			reg = <0x14c20000 0x100>;
+			interrupts = <0 456 0>;
+			clocks = <&clock_peric1 PCLK_UART1>, <&clock_peric1 SCLK_UART1>;
+			clock-names = "uart", "clk_uart_baud0";
+			status = "disabled";
+		};
+
+		serial_2: serial@14c30000 {
+			compatible = "samsung,exynos4210-uart";
+			reg = <0x14c30000 0x100>;
+			interrupts = <0 457 0>;
+			clocks = <&clock_peric1 PCLK_UART2>, <&clock_peric1 SCLK_UART2>;
+			clock-names = "uart", "clk_uart_baud0";
+			status = "disabled";
+		};
+
+		serial_3: serial@14c40000 {
+			compatible = "samsung,exynos4210-uart";
+			reg = <0x14c40000 0x100>;
+			interrupts = <0 458 0>;
+			clocks = <&clock_peric1 PCLK_UART3>, <&clock_peric1 SCLK_UART3>;
+			clock-names = "uart", "clk_uart_baud0";
+			status = "disabled";
+		};
+
+		timer {
+			compatible = "arm,armv8-timer";
+			interrupts = <1 13 0xff01>,
+				     <1 14 0xff01>,
+				     <1 11 0xff01>,
+				     <1 10 0xff01>;
+		};
+	};
+};