| Message ID | 00f249b3d648d3a8d550c5db0737f3aa6d93f07e.1410362950.git.marcel@ziswiler.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 09/10/2014 02:54 PM, Marcel Ziswiler wrote: > Integrate Freescale SGTL5000 analogue audio codec support. > > Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> > Reviewed-by: Stephen Warren <swarren@nvidia.com> No, definitely not; this patch has significant semantic changes since I reviewed it. > diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi > + sound { > + compatible = "simple-audio-card"; ... > + simple-audio-card,codec { > + bitclock-master; > + clocks = <&tegra_car TEGRA30_CLK_EXTERN1>; > + frame-master; > + sound-dai = <&sgtl5000>; > + }; > + > + simple-audio-card,cpu { > + bitclock-master; > + clocks = <&tegra_car TEGRA30_CLK_PLL_A>, > + <&tegra_car TEGRA30_CLK_PLL_A_OUT0>; > + frame-master; > + master-clkdir-out; > + sound-dai = <&tegra_i2s2>; > + }; > + }; I'm not sure how this can work. Certainly all 3 clocks that are required for audio are mentioned here. However, the PLL_A clock (which then trickles down to the other 2) needs to have its rate changed based on whether the sample rate is 44.1KHz- or 48KHz-based. Semantically, this can't be something that "simple-audio-card" can imply, since "simple-audio-card" is something agnostic to any HW, whereas this clocking requirement is something specific to Tegra HW. To see the problem, try encoding some audio stream as both 44.1KHz and 48KHz, then play a few seconds of each and keep switching back and forth. You'll likely find either the playback pitch is wrong, or you get drop-outs or stuttering. I also wonder how "simple-audio-card" can know what rate the EXTERN1 clock to the CODEC should be set to; each CODEC has a different requirement for the minimum clock input and the Fs multiple usually varies for different sample rates. See for example sound/soc/tegra/tegra_wm8903.c:tegra_wm8903_hw_params(). This could be a solved problem though: Perhaps some API has been added to CODECs to report this information (or perhaps CODEC drivers now clk_set_rate() on their input clocks themselves) since I last looked.
On Wed, 2014-09-10 at 15:26 -0600, Stephen Warren wrote: > No, definitely not; this patch has significant semantic changes since I > reviewed it. OK, sorry. Admittedly this was probably a little bit too quick a shot. The solution looked so clean and on first sight worked just fine. > I'm not sure how this can work. Certainly all 3 clocks that are required > for audio are mentioned here. However, the PLL_A clock (which then > trickles down to the other 2) needs to have its rate changed based on > whether the sample rate is 44.1KHz- or 48KHz-based. Semantically, this > can't be something that "simple-audio-card" can imply, since > "simple-audio-card" is something agnostic to any HW, whereas this > clocking requirement is something specific to Tegra HW. Yes, now as you mention it I forgot about the whole tegra_asoc_utils_set_rate() stuff! > To see the problem, try encoding some audio stream as both 44.1KHz and > 48KHz, then play a few seconds of each and keep switching back and > forth. You'll likely find either the playback pitch is wrong, or you get > drop-outs or stuttering. Yeah, right. Clocks seem to be stuck at the 44.1 kHz setting. > I also wonder how "simple-audio-card" can know what rate the EXTERN1 > clock to the CODEC should be set to; each CODEC has a different > requirement for the minimum clock input and the Fs multiple usually > varies for different sample rates. See for example > sound/soc/tegra/tegra_wm8903.c:tegra_wm8903_hw_params(). This could be a > solved problem though: Perhaps some API has been added to CODECs to > report this information (or perhaps CODEC drivers now clk_set_rate() on > their input clocks themselves) since I last looked. If there are no objections I will just revive version 1 again and send it around as a new version 3 just to prevent any further confusion.
diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi index a5446cb..fa3bc92 100644 --- a/arch/arm/boot/dts/tegra30-apalis.dtsi +++ b/arch/arm/boot/dts/tegra30-apalis.dtsi @@ -47,6 +47,24 @@ pinctrl-0 = <&state_default>; state_default: pinmux { + /* Apalis Analogue Audio */ + clk1_out_pw4 { + nvidia,pins = "clk1_out_pw4"; + nvidia,function = "extperiph1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap3_fs_pp0 { + nvidia,pins = "dap3_fs_pp0", + "dap3_sclk_pp3", + "dap3_din_pp1", + "dap3_dout_pp2"; + nvidia,function = "i2s2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + /* Apalis BKL1_ON */ pv2 { nvidia,pins = "pv2"; @@ -404,6 +422,16 @@ status = "okay"; clock-frequency = <100000>; + /* SGTL5000 audio codec */ + sgtl5000: codec@0a { + #sound-dai-cells = <0>; + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + VDDA-supply = <&sys_3v3_reg>; + VDDIO-supply = <&sys_3v3_reg>; + clocks = <&tegra_car TEGRA30_CLK_EXTERN1>; + }; + pmic: tps65911@2d { compatible = "ti,tps65911"; reg = <0x2d>; @@ -635,6 +663,13 @@ nvidia,sys-clock-req-active-high; }; + ahub@70080000 { + i2s@70080500 { + #sound-dai-cells = <0>; + status = "okay"; + }; + }; + sdhci@78000600 { status = "okay"; bus-width = <8>; @@ -684,4 +719,34 @@ regulator-always-on; }; }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,name = "Toradex Apalis T30"; + simple-audio-card,routing = + "Headphone Jack", "HP_OUT", + "LINE_IN", "Line In Jack", + "MIC_IN", "Microphone Jack"; + simple-audio-card,widgets = + "Headphone", "Headphone Jack", + "Line In", "Line In Jack", + "Microphone", "Microphone Jack"; + + simple-audio-card,codec { + bitclock-master; + clocks = <&tegra_car TEGRA30_CLK_EXTERN1>; + frame-master; + sound-dai = <&sgtl5000>; + }; + + simple-audio-card,cpu { + bitclock-master; + clocks = <&tegra_car TEGRA30_CLK_PLL_A>, + <&tegra_car TEGRA30_CLK_PLL_A_OUT0>; + frame-master; + master-clkdir-out; + sound-dai = <&tegra_i2s2>; + }; + }; }; diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi index c4ed1be..1f97348 100644 --- a/arch/arm/boot/dts/tegra30-colibri.dtsi +++ b/arch/arm/boot/dts/tegra30-colibri.dtsi @@ -29,6 +29,24 @@ pinctrl-0 = <&state_default>; state_default: pinmux { + /* Colibri Analogue Audio */ + clk1_out_pw4 { + nvidia,pins = "clk1_out_pw4"; + nvidia,function = "extperiph1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap3_fs_pp0 { + nvidia,pins = "dap3_fs_pp0", + "dap3_sclk_pp3", + "dap3_din_pp1", + "dap3_dout_pp2"; + nvidia,function = "i2s2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + /* Colibri BL_ON */ pv2 { nvidia,pins = "pv2"; @@ -182,6 +200,16 @@ status = "okay"; clock-frequency = <100000>; + /* SGTL5000 audio codec */ + sgtl5000: codec@0a { + #sound-dai-cells = <0>; + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + VDDA-supply = <&sys_3v3_reg>; + VDDIO-supply = <&sys_3v3_reg>; + clocks = <&tegra_car TEGRA30_CLK_EXTERN1>; + }; + pmic: tps65911@2d { compatible = "ti,tps65911"; reg = <0x2d>; @@ -331,6 +359,13 @@ nvidia,sys-clock-req-active-high; }; + ahub@70080000 { + i2s@70080500 { + #sound-dai-cells = <0>; + status = "okay"; + }; + }; + emmc: sdhci@78000600 { status = "okay"; bus-width = <8>; @@ -383,4 +418,34 @@ regulator-always-on; }; }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,name = "Toradex Colibri T30"; + simple-audio-card,routing = + "Headphone Jack", "HP_OUT", + "LINE_IN", "Line In Jack", + "MIC_IN", "Microphone Jack"; + simple-audio-card,widgets = + "Headphone", "Headphone Jack", + "Line In", "Line In Jack", + "Microphone", "Microphone Jack"; + + simple-audio-card,codec { + bitclock-master; + clocks = <&tegra_car TEGRA30_CLK_EXTERN1>; + frame-master; + sound-dai = <&sgtl5000>; + }; + + simple-audio-card,cpu { + bitclock-master; + clocks = <&tegra_car TEGRA30_CLK_PLL_A>, + <&tegra_car TEGRA30_CLK_PLL_A_OUT0>; + frame-master; + master-clkdir-out; + sound-dai = <&tegra_i2s2>; + }; + }; };