drm/radeon: Clear RB_OVERFLOW bit earlier

Message ID	1411096031-2945-1-git-send-email-michel@daenzer.net (mailing list archive)
State	New, archived
Headers	show Return-Path: <dri-devel-bounces@lists.freedesktop.org> From: =?UTF-8?q?Michel=20D=C3=A4nzer?= <michel@daenzer.net> To: dri-devel@lists.freedesktop.org Subject: [PATCH] drm/radeon: Clear RB_OVERFLOW bit earlier Date: Fri, 19 Sep 2014 12:07:11 +0900 Message-Id: <1411096031-2945-1-git-send-email-michel@daenzer.net> MIME-Version: 1.0 Precedence: list Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" <dri-devel-bounces@lists.freedesktop.org>

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1411096031-2945-1-git-send-email-michel@daenzer.net (mailing list archive)

State

New, archived

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From: =?UTF-8?q?Michel=20D=C3=A4nzer?= <michel@daenzer.net>
To: dri-devel@lists.freedesktop.org
Subject: [PATCH] drm/radeon: Clear RB_OVERFLOW bit earlier
Date: Fri, 19 Sep 2014 12:07:11 +0900
Message-Id: <1411096031-2945-1-git-send-email-michel@daenzer.net>
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Commit Message

Michel Dänzer Sept. 19, 2014, 3:07 a.m. UTC

From: Michel Dänzer <michel.daenzer@amd.com>

Otherwise the bit remains set in rdev->ih.rptr, so the wptr can never
match that and we still have an infinite loop.

This fix allows me to successfully recover from an IH ring buffer
overflow.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
---
 drivers/gpu/drm/radeon/cik.c       | 2 +-
 drivers/gpu/drm/radeon/evergreen.c | 2 +-
 drivers/gpu/drm/radeon/r600.c      | 2 +-
 drivers/gpu/drm/radeon/si.c        | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

Comments

Alex Deucher Sept. 19, 2014, 1:19 p.m. UTC | #1

On Thu, Sep 18, 2014 at 11:07 PM, Michel Dänzer <michel@daenzer.net> wrote:
> From: Michel Dänzer <michel.daenzer@amd.com>
>
> Otherwise the bit remains set in rdev->ih.rptr, so the wptr can never
> match that and we still have an infinite loop.
>
> This fix allows me to successfully recover from an IH ring buffer
> overflow.
>
> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>


All three patches applied to my -fixes tree.  Thanks!

Alex

> ---
>  drivers/gpu/drm/radeon/cik.c       | 2 +-
>  drivers/gpu/drm/radeon/evergreen.c | 2 +-
>  drivers/gpu/drm/radeon/r600.c      | 2 +-
>  drivers/gpu/drm/radeon/si.c        | 2 +-
>  4 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
> index 13367f4..87a7489 100644
> --- a/drivers/gpu/drm/radeon/cik.c
> +++ b/drivers/gpu/drm/radeon/cik.c
> @@ -7751,6 +7751,7 @@ static inline u32 cik_get_ih_wptr(struct radeon_device *rdev)
>                 wptr = RREG32(IH_RB_WPTR);
>
>         if (wptr & RB_OVERFLOW) {
> +               wptr &= ~RB_OVERFLOW;
>                 /* When a ring buffer overflow happen start parsing interrupt
>                  * from the last not overwritten vector (wptr + 16). Hopefully
>                  * this should allow us to catchup.
> @@ -7761,7 +7762,6 @@ static inline u32 cik_get_ih_wptr(struct radeon_device *rdev)
>                 tmp = RREG32(IH_RB_CNTL);
>                 tmp |= IH_WPTR_OVERFLOW_CLEAR;
>                 WREG32(IH_RB_CNTL, tmp);
> -               wptr &= ~RB_OVERFLOW;
>         }
>         return (wptr & rdev->ih.ptr_mask);
>  }
> diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
> index dbca60c..6a50b03 100644
> --- a/drivers/gpu/drm/radeon/evergreen.c
> +++ b/drivers/gpu/drm/radeon/evergreen.c
> @@ -4749,6 +4749,7 @@ static u32 evergreen_get_ih_wptr(struct radeon_device *rdev)
>                 wptr = RREG32(IH_RB_WPTR);
>
>         if (wptr & RB_OVERFLOW) {
> +               wptr &= ~RB_OVERFLOW;
>                 /* When a ring buffer overflow happen start parsing interrupt
>                  * from the last not overwritten vector (wptr + 16). Hopefully
>                  * this should allow us to catchup.
> @@ -4759,7 +4760,6 @@ static u32 evergreen_get_ih_wptr(struct radeon_device *rdev)
>                 tmp = RREG32(IH_RB_CNTL);
>                 tmp |= IH_WPTR_OVERFLOW_CLEAR;
>                 WREG32(IH_RB_CNTL, tmp);
> -               wptr &= ~RB_OVERFLOW;
>         }
>         return (wptr & rdev->ih.ptr_mask);
>  }
> diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
> index e8bf0ea..007c903 100644
> --- a/drivers/gpu/drm/radeon/r600.c
> +++ b/drivers/gpu/drm/radeon/r600.c
> @@ -3802,6 +3802,7 @@ static u32 r600_get_ih_wptr(struct radeon_device *rdev)
>                 wptr = RREG32(IH_RB_WPTR);
>
>         if (wptr & RB_OVERFLOW) {
> +               wptr &= ~RB_OVERFLOW;
>                 /* When a ring buffer overflow happen start parsing interrupt
>                  * from the last not overwritten vector (wptr + 16). Hopefully
>                  * this should allow us to catchup.
> @@ -3812,7 +3813,6 @@ static u32 r600_get_ih_wptr(struct radeon_device *rdev)
>                 tmp = RREG32(IH_RB_CNTL);
>                 tmp |= IH_WPTR_OVERFLOW_CLEAR;
>                 WREG32(IH_RB_CNTL, tmp);
> -               wptr &= ~RB_OVERFLOW;
>         }
>         return (wptr & rdev->ih.ptr_mask);
>  }
> diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
> index 23ff34a..9e591ad 100644
> --- a/drivers/gpu/drm/radeon/si.c
> +++ b/drivers/gpu/drm/radeon/si.c
> @@ -6317,6 +6317,7 @@ static inline u32 si_get_ih_wptr(struct radeon_device *rdev)
>                 wptr = RREG32(IH_RB_WPTR);
>
>         if (wptr & RB_OVERFLOW) {
> +               wptr &= ~RB_OVERFLOW;
>                 /* When a ring buffer overflow happen start parsing interrupt
>                  * from the last not overwritten vector (wptr + 16). Hopefully
>                  * this should allow us to catchup.
> @@ -6327,7 +6328,6 @@ static inline u32 si_get_ih_wptr(struct radeon_device *rdev)
>                 tmp = RREG32(IH_RB_CNTL);
>                 tmp |= IH_WPTR_OVERFLOW_CLEAR;
>                 WREG32(IH_RB_CNTL, tmp);
> -               wptr &= ~RB_OVERFLOW;
>         }
>         return (wptr & rdev->ih.ptr_mask);
>  }
> --
> 2.1.0
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel

diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 13367f4..87a7489 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -7751,6 +7751,7 @@  static inline u32 cik_get_ih_wptr(struct radeon_device *rdev)
 		wptr = RREG32(IH_RB_WPTR);
 
 	if (wptr & RB_OVERFLOW) {
+		wptr &= ~RB_OVERFLOW;
 		/* When a ring buffer overflow happen start parsing interrupt
 		 * from the last not overwritten vector (wptr + 16). Hopefully
 		 * this should allow us to catchup.
@@ -7761,7 +7762,6 @@  static inline u32 cik_get_ih_wptr(struct radeon_device *rdev)
 		tmp = RREG32(IH_RB_CNTL);
 		tmp |= IH_WPTR_OVERFLOW_CLEAR;
 		WREG32(IH_RB_CNTL, tmp);
-		wptr &= ~RB_OVERFLOW;
 	}
 	return (wptr & rdev->ih.ptr_mask);
 }
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index dbca60c..6a50b03 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -4749,6 +4749,7 @@  static u32 evergreen_get_ih_wptr(struct radeon_device *rdev)
 		wptr = RREG32(IH_RB_WPTR);
 
 	if (wptr & RB_OVERFLOW) {
+		wptr &= ~RB_OVERFLOW;
 		/* When a ring buffer overflow happen start parsing interrupt
 		 * from the last not overwritten vector (wptr + 16). Hopefully
 		 * this should allow us to catchup.
@@ -4759,7 +4760,6 @@  static u32 evergreen_get_ih_wptr(struct radeon_device *rdev)
 		tmp = RREG32(IH_RB_CNTL);
 		tmp |= IH_WPTR_OVERFLOW_CLEAR;
 		WREG32(IH_RB_CNTL, tmp);
-		wptr &= ~RB_OVERFLOW;
 	}
 	return (wptr & rdev->ih.ptr_mask);
 }
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index e8bf0ea..007c903 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -3802,6 +3802,7 @@  static u32 r600_get_ih_wptr(struct radeon_device *rdev)
 		wptr = RREG32(IH_RB_WPTR);
 
 	if (wptr & RB_OVERFLOW) {
+		wptr &= ~RB_OVERFLOW;
 		/* When a ring buffer overflow happen start parsing interrupt
 		 * from the last not overwritten vector (wptr + 16). Hopefully
 		 * this should allow us to catchup.
@@ -3812,7 +3813,6 @@  static u32 r600_get_ih_wptr(struct radeon_device *rdev)
 		tmp = RREG32(IH_RB_CNTL);
 		tmp |= IH_WPTR_OVERFLOW_CLEAR;
 		WREG32(IH_RB_CNTL, tmp);
-		wptr &= ~RB_OVERFLOW;
 	}
 	return (wptr & rdev->ih.ptr_mask);
 }
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index 23ff34a..9e591ad 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -6317,6 +6317,7 @@  static inline u32 si_get_ih_wptr(struct radeon_device *rdev)
 		wptr = RREG32(IH_RB_WPTR);
 
 	if (wptr & RB_OVERFLOW) {
+		wptr &= ~RB_OVERFLOW;
 		/* When a ring buffer overflow happen start parsing interrupt
 		 * from the last not overwritten vector (wptr + 16). Hopefully
 		 * this should allow us to catchup.
@@ -6327,7 +6328,6 @@  static inline u32 si_get_ih_wptr(struct radeon_device *rdev)
 		tmp = RREG32(IH_RB_CNTL);
 		tmp |= IH_WPTR_OVERFLOW_CLEAR;
 		WREG32(IH_RB_CNTL, tmp);
-		wptr &= ~RB_OVERFLOW;
 	}
 	return (wptr & rdev->ih.ptr_mask);
 }

drm/radeon: Clear RB_OVERFLOW bit earlier

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