From patchwork Tue Oct 7 19:48:17 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tthayer@opensource.altera.com X-Patchwork-Id: 5048921 Return-Path: X-Original-To: patchwork-linux-spi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 2BA0B9F349 for ; Tue, 7 Oct 2014 19:57:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4F0692021F for ; Tue, 7 Oct 2014 19:57:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 527E8201F4 for ; Tue, 7 Oct 2014 19:57:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754494AbaJGT53 (ORCPT ); Tue, 7 Oct 2014 15:57:29 -0400 Received: from mail-bn1on0075.outbound.protection.outlook.com ([157.56.110.75]:24349 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752961AbaJGT53 (ORCPT ); Tue, 7 Oct 2014 15:57:29 -0400 Received: from dinh-ubuntu.altera.com (64.129.157.38) by BN1PR03MB121.namprd03.prod.outlook.com (10.255.201.16) with Microsoft SMTP Server (TLS) id 15.0.1044.10; Tue, 7 Oct 2014 19:41:37 +0000 From: To: , , , , , , , CC: , , , , , , , , Subject: [PATCH 2/2] arm: dts: socfpga: Add SPI nodes & update copyright. Date: Tue, 7 Oct 2014 14:48:17 -0500 Message-ID: <1412711297-31857-3-git-send-email-tthayer@opensource.altera.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1412711297-31857-1-git-send-email-tthayer@opensource.altera.com> References: <1412711297-31857-1-git-send-email-tthayer@opensource.altera.com> MIME-Version: 1.0 X-Originating-IP: [64.129.157.38] X-ClientProxiedBy: BN1PR08CA0023.namprd08.prod.outlook.com (10.242.217.151) To BN1PR03MB121.namprd03.prod.outlook.com (10.255.201.16) X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:BN1PR03MB121; X-Exchange-Antispam-Report-Test: UriScan:; X-Forefront-PRVS: 035748864E X-Forefront-Antispam-Report: SFV:NSPM; SFS:(10009020)(6009001)(189002)(199003)(22564002)(85852003)(15975445006)(15202345003)(69596002)(19580395003)(19580405001)(53416004)(50226001)(89996001)(33646002)(4396001)(42186005)(122386002)(76176999)(104166001)(87976001)(88136002)(31966008)(50986999)(80022003)(20776003)(66066001)(120916001)(46102003)(97736003)(101416001)(64706001)(92726001)(2201001)(92566001)(50466002)(81156004)(102836001)(105586002)(106356001)(95666004)(86152002)(99396003)(86362001)(47776003)(87286001)(77096002)(77156001)(93916002)(85306004)(107046002)(76482002)(229853001)(62966002)(48376002)(21056001)(40100002)(2004002); DIR:OUT; SFP:1101; SCL:1; SRVR:BN1PR03MB121; H:dinh-ubuntu.altera.com; FPR:; MLV:sfv; PTR:InfoNoRecords; MX:1; A:0; LANG:en; X-OriginatorOrg: opensource.altera.com Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Thor Thayer Add 2 SPI nodes to SOCFPGA device tree. Update copyright. Update spi-dw.txt with bus-num as an optional property. Signed-off-by: Thor Thayer --- Documentation/devicetree/bindings/spi/spi-dw.txt | 1 + arch/arm/boot/dts/socfpga.dtsi | 52 ++++++++++++++++++---- 2 files changed, 45 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/spi-dw.txt b/Documentation/devicetree/bindings/spi/spi-dw.txt index 7b63ed6..f1d54e6 100644 --- a/Documentation/devicetree/bindings/spi/spi-dw.txt +++ b/Documentation/devicetree/bindings/spi/spi-dw.txt @@ -11,6 +11,7 @@ Required properties: Optional properties: - cs-gpios: see spi-bus.txt +- bus-num: see spi-bus.txt Example: diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 4d77ad6..42855bc 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -1,15 +1,14 @@ /* - * Copyright (C) 2012 Altera + * Copyright Altera Corporation (C) 2012-2014. All rights reserved. * * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. + * it under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. * * You should have received a copy of the GNU General Public License * along with this program. If not, see . @@ -628,6 +627,43 @@ clock-names = "biu", "ciu"; }; + spi0: spi@fff00000 { + compatible = "snps,dw-apb-ssi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xfff00000 0x1000>; + interrupts = <0 154 4>; + num-cs = <4>; + bus-num = <0>; + clocks = <&per_base_clk>; + + spidev@0 { + compatible = "spidev"; + reg = <0>; /* chip select */ + spi-max-frequency = <100000000>; + enable-dma = <1>; + }; + }; + + spi1: spi@fff01000 { + compatible = "snps,dw-apb-ssi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xfff01000 0x1000>; + interrupts = <0 156 4>; + num-cs = <4>; + bus-num = <1>; + clocks = <&per_base_clk>; + status = "disabled"; + + spidev@0 { + compatible = "spidev"; + reg = <0>; + spi-max-frequency = <100000000>; + enable-dma = <1>; + }; + }; + /* Local timer */ timer@fffec600 { compatible = "arm,cortex-a9-twd-timer";