[PM,1/1] OMAP3 McSPI: Fix to restore chconf for all CSs
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Message ID 1233668121-32200-2-git-send-email-jouni.hogander@nokia.com
State Superseded
Delegated to: Kevin Hilman
Headers show

Commit Message

Jouni Hogander Feb. 3, 2009, 1:35 p.m. UTC
This patch saves/restores chconf0 for all CSs instead of only for CS0

Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com>
---
 drivers/spi/omap2_mcspi.c |   14 +++++++-------
 1 files changed, 7 insertions(+), 7 deletions(-)

Comments

Tony Lindgren Feb. 27, 2009, 6:27 p.m. UTC | #1
* Jouni Hogander <jouni.hogander@nokia.com> [090203 05:37]:
> This patch saves/restores chconf0 for all CSs instead of only for CS0

This should be sent to David Brownell to LKML for integration to
the mainline tree. For the right mailing list, please take a look
at "SPI SUBSYSTEM" in the MAINTAINERS file.

Regards,

Tony
 
> Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com>
> ---
>  drivers/spi/omap2_mcspi.c |   14 +++++++-------
>  1 files changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/spi/omap2_mcspi.c b/drivers/spi/omap2_mcspi.c
> index a7ee3b7..45632dd 100644
> --- a/drivers/spi/omap2_mcspi.c
> +++ b/drivers/spi/omap2_mcspi.c
> @@ -142,7 +142,7 @@ struct omap2_mcspi_cs {
>  struct omap2_mcspi_regs {
>  	u32 sysconfig;
>  	u32 modulctrl;
> -	u32 chconf0;
> +	u32 chconf0[4];
>  	u32 wakeupenable;
>  };
>  
> @@ -238,8 +238,8 @@ static void omap2_mcspi_set_master_mode(struct spi_master *master)
>  
>  static void omap2_mcspi_restore_ctx(struct omap2_mcspi *mcspi)
>  {
> -	struct spi_master *spi_cntrl;
> -	spi_cntrl = mcspi->master;
> +	struct spi_master *spi_cntrl = mcspi->master;
> +	int i;
>  
>  	/* McSPI: context restore */
>  	mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_MODULCTRL,
> @@ -248,9 +248,9 @@ static void omap2_mcspi_restore_ctx(struct omap2_mcspi *mcspi)
>  	mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_SYSCONFIG,
>  			omap2_mcspi_ctx[spi_cntrl->bus_num - 1].sysconfig);
>  
> -	mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_CHCONF0,
> -			omap2_mcspi_ctx[spi_cntrl->bus_num - 1].chconf0);
> -
> +	for (i = 0; i < spi_cntrl->num_chipselect; i++)
> +		mcspi_write_reg(spi_cntrl, i * 0x14 + OMAP2_MCSPI_CHCONF0,
> +				omap2_mcspi_ctx[spi_cntrl->bus_num - 1].chconf0[i]);
>  
>  	mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_WAKEUPENABLE,
>  			omap2_mcspi_ctx[spi_cntrl->bus_num - 1].wakeupenable);
> @@ -593,7 +593,7 @@ static int omap2_mcspi_setup_transfer(struct spi_device *spi,
>  
>  	mcspi_write_cs_reg(spi, OMAP2_MCSPI_CHCONF0, l);
>  
> -	omap2_mcspi_ctx[spi_cntrl->bus_num - 1].chconf0 = l;
> +	omap2_mcspi_ctx[spi_cntrl->bus_num - 1].chconf0[spi->chip_select] = l;
>  
>  	dev_dbg(&spi->dev, "setup: speed %d, sample %s edge, clk %s\n",
>  			OMAP2_MCSPI_MAX_FREQ / (1 << div),
> -- 
> 1.6.0.1
> 
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Patch
diff mbox

diff --git a/drivers/spi/omap2_mcspi.c b/drivers/spi/omap2_mcspi.c
index a7ee3b7..45632dd 100644
--- a/drivers/spi/omap2_mcspi.c
+++ b/drivers/spi/omap2_mcspi.c
@@ -142,7 +142,7 @@  struct omap2_mcspi_cs {
 struct omap2_mcspi_regs {
 	u32 sysconfig;
 	u32 modulctrl;
-	u32 chconf0;
+	u32 chconf0[4];
 	u32 wakeupenable;
 };
 
@@ -238,8 +238,8 @@  static void omap2_mcspi_set_master_mode(struct spi_master *master)
 
 static void omap2_mcspi_restore_ctx(struct omap2_mcspi *mcspi)
 {
-	struct spi_master *spi_cntrl;
-	spi_cntrl = mcspi->master;
+	struct spi_master *spi_cntrl = mcspi->master;
+	int i;
 
 	/* McSPI: context restore */
 	mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_MODULCTRL,
@@ -248,9 +248,9 @@  static void omap2_mcspi_restore_ctx(struct omap2_mcspi *mcspi)
 	mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_SYSCONFIG,
 			omap2_mcspi_ctx[spi_cntrl->bus_num - 1].sysconfig);
 
-	mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_CHCONF0,
-			omap2_mcspi_ctx[spi_cntrl->bus_num - 1].chconf0);
-
+	for (i = 0; i < spi_cntrl->num_chipselect; i++)
+		mcspi_write_reg(spi_cntrl, i * 0x14 + OMAP2_MCSPI_CHCONF0,
+				omap2_mcspi_ctx[spi_cntrl->bus_num - 1].chconf0[i]);
 
 	mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_WAKEUPENABLE,
 			omap2_mcspi_ctx[spi_cntrl->bus_num - 1].wakeupenable);
@@ -593,7 +593,7 @@  static int omap2_mcspi_setup_transfer(struct spi_device *spi,
 
 	mcspi_write_cs_reg(spi, OMAP2_MCSPI_CHCONF0, l);
 
-	omap2_mcspi_ctx[spi_cntrl->bus_num - 1].chconf0 = l;
+	omap2_mcspi_ctx[spi_cntrl->bus_num - 1].chconf0[spi->chip_select] = l;
 
 	dev_dbg(&spi->dev, "setup: speed %d, sample %s edge, clk %s\n",
 			OMAP2_MCSPI_MAX_FREQ / (1 << div),