| Message ID | 1415368177-6637-5-git-send-email-zyw@rock-chips.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Chris, On Fri, Nov 7, 2014 at 5:49 AM, Chris Zhong <zyw@rock-chips.com> wrote: > add pmu sram node for suspend, add global_pwroff pinctrl. > The pmu sram is used to store the resume code. > global_pwroff is held low level at work, it would be pull to high > when entering suspend. reference this in the board DTS file since > some boards need it. > > Signed-off-by: Tony Xie <xxx@rock-chips.com> > Signed-off-by: Chris Zhong <zyw@rock-chips.com> > Reviewed-by: Doug Anderson <dianders@chromium.org> > Tested-by: Doug Anderson <dianders@chromium.org> > > --- > > Changes in v7: None > Changes in v6: > - change pmu_intmem@ff720000 to sram@ff720000 > > Changes in v5: > - change size to 4k > > Changes in v4: None > Changes in v3: None > Changes in v2: > - put "rockchip,rk3288-pmu-sram" to first > > arch/arm/boot/dts/rk3288.dtsi | 11 +++++++++++ > 1 file changed, 11 insertions(+) I was sorta hoping that when you sent out v7 you'd incorporate the extra dts bits that you sent me and that I had stashed at <https://chromium-review.googlesource.com/#/c/226826/>. Maybe you could do it if you send out a v8. If you don't send out a v8 we could always land those bits separately. -Doug
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index cfc4378..0747c30 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -462,6 +462,11 @@ status = "disabled"; }; + sram@ff720000 { + compatible = "rockchip,rk3288-pmu-sram", "mmio-sram"; + reg = <0xff720000 0x1000>; + }; + pmu: power-management@ff730000 { compatible = "rockchip,rk3288-pmu", "syscon"; reg = <0xff730000 0x100>; @@ -667,6 +672,12 @@ bias-disable; }; + sleep { + global_pwroff: global-pwroff { + rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + i2c0 { i2c0_xfer: i2c0-xfer { rockchip,pins = <0 15 RK_FUNC_1 &pcfg_pull_none>,