| Message ID | 1418333289-24975-1-git-send-email-jordan.l.justen@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Thu, Dec 11, 2014 at 01:28:09PM -0800, Jordan Justen wrote: > This will allow us to read the number of dispatched compute threads > for GL_ARB_pipeline_statistics_query. > > Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> > Cc: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> [snip]
On Thu, Dec 11, 2014 at 03:48:20PM -0800, Ben Widawsky wrote: > On Thu, Dec 11, 2014 at 01:28:09PM -0800, Jordan Justen wrote: > > This will allow us to read the number of dispatched compute threads > > for GL_ARB_pipeline_statistics_query. Just so we have all the formally required pieces: Can you please supply a link to the mesa code for this? I'm a bit behind on reading mesa-dev. > > Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> > > Cc: Ben Widawsky <ben@bwidawsk.net> > Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Queued for -next, thanks for the patch. -Daniel
On 2014-12-15 06:59:16, Daniel Vetter wrote: > On Thu, Dec 11, 2014 at 03:48:20PM -0800, Ben Widawsky wrote: > > On Thu, Dec 11, 2014 at 01:28:09PM -0800, Jordan Justen wrote: > > > This will allow us to read the number of dispatched compute threads > > > for GL_ARB_pipeline_statistics_query. > > Just so we have all the formally required pieces: Can you please supply a > link to the mesa code for this? I'm a bit behind on reading mesa-dev. This is an early hacked version of mesa that uses the register: http://cgit.freedesktop.org/~jljusten/mesa/log/?h=cs%2bps I veried reading the register with the modified mesa and a piglit test. I first tested with the cmd parser disabled, and then with this patch. I'm waiting for the initial GL_ARB_pipeline_statistics_query extension (without CS support) to make it upstream in mesa before finishing and sending out the CS support. If this is in next, can I proceed to upstream a mesa patch that depends on version 3 of the command parser? Or, should I wait until this makes it fully upstream? -Jordan
On Mon, Dec 15, 2014 at 11:50:24AM -0800, Jordan Justen wrote: > On 2014-12-15 06:59:16, Daniel Vetter wrote: > > On Thu, Dec 11, 2014 at 03:48:20PM -0800, Ben Widawsky wrote: > > > On Thu, Dec 11, 2014 at 01:28:09PM -0800, Jordan Justen wrote: > > > > This will allow us to read the number of dispatched compute threads > > > > for GL_ARB_pipeline_statistics_query. > > > > Just so we have all the formally required pieces: Can you please supply a > > link to the mesa code for this? I'm a bit behind on reading mesa-dev. > > This is an early hacked version of mesa that uses the register: > http://cgit.freedesktop.org/~jljusten/mesa/log/?h=cs%2bps > > I veried reading the register with the modified mesa and a piglit > test. I first tested with the cmd parser disabled, and then with this > patch. > > I'm waiting for the initial GL_ARB_pipeline_statistics_query extension > (without CS support) to make it upstream in mesa before finishing and > sending out the CS support. > > If this is in next, can I proceed to upstream a mesa patch that > depends on version 3 of the command parser? Or, should I wait until > this makes it fully upstream? If we go super strict with rule abi is locked down when I tag drm-intel-next at the end of this weeek. But that's hair-splitting. So yeah, as soon as all the mesa depencies have landed you can just go ahead with your patches. -Daniel
diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c index 6e9eac4..82679c9 100644 --- a/drivers/gpu/drm/i915/i915_cmd_parser.c +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c @@ -401,6 +401,7 @@ static const struct drm_i915_cmd_table hsw_blt_ring_cmds[] = { #define REG64(addr) (addr), (addr + sizeof(u32)) static const u32 gen7_render_regs[] = { + REG64(GPGPU_THREADS_DISPATCHED), REG64(HS_INVOCATION_COUNT), REG64(DS_INVOCATION_COUNT), REG64(IA_VERTICES_COUNT), @@ -1076,6 +1077,7 @@ int i915_cmd_parser_get_version(void) * hardware parsing enabled (so does not allow new use cases). * 2. Allow access to the MI_PREDICATE_SRC0 and * MI_PREDICATE_SRC1 registers. + * 3. Allow access to the GPGPU_THREADS_DISPATCHED register. */ - return 2; + return 3; } diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 869e5ae..0e6e694 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -460,17 +460,18 @@ */ #define BCS_SWCTRL 0x22200 -#define HS_INVOCATION_COUNT 0x2300 -#define DS_INVOCATION_COUNT 0x2308 -#define IA_VERTICES_COUNT 0x2310 -#define IA_PRIMITIVES_COUNT 0x2318 -#define VS_INVOCATION_COUNT 0x2320 -#define GS_INVOCATION_COUNT 0x2328 -#define GS_PRIMITIVES_COUNT 0x2330 -#define CL_INVOCATION_COUNT 0x2338 -#define CL_PRIMITIVES_COUNT 0x2340 -#define PS_INVOCATION_COUNT 0x2348 -#define PS_DEPTH_COUNT 0x2350 +#define GPGPU_THREADS_DISPATCHED 0x2290 +#define HS_INVOCATION_COUNT 0x2300 +#define DS_INVOCATION_COUNT 0x2308 +#define IA_VERTICES_COUNT 0x2310 +#define IA_PRIMITIVES_COUNT 0x2318 +#define VS_INVOCATION_COUNT 0x2320 +#define GS_INVOCATION_COUNT 0x2328 +#define GS_PRIMITIVES_COUNT 0x2330 +#define CL_INVOCATION_COUNT 0x2338 +#define CL_PRIMITIVES_COUNT 0x2340 +#define PS_INVOCATION_COUNT 0x2348 +#define PS_DEPTH_COUNT 0x2350 /* There are the 4 64-bit counter registers, one for each stream output */ #define GEN7_SO_NUM_PRIMS_WRITTEN(n) (0x5200 + (n) * 8)
This will allow us to read the number of dispatched compute threads for GL_ARB_pipeline_statistics_query. Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Cc: Ben Widawsky <ben@bwidawsk.net> --- drivers/gpu/drm/i915/i915_cmd_parser.c | 4 +++- drivers/gpu/drm/i915/i915_reg.h | 23 ++++++++++++----------- 2 files changed, 15 insertions(+), 12 deletions(-)