From patchwork Mon Jan 26 10:18:28 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zubair Lutfullah Kakakhel X-Patchwork-Id: 5708491 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 4F024C058D for ; Mon, 26 Jan 2015 10:53:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0B6A02012E for ; Mon, 26 Jan 2015 10:53:41 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id DA54920103 for ; Mon, 26 Jan 2015 10:53:39 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id E0792260540; Mon, 26 Jan 2015 11:53:38 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,NO_DNS_FOR_FROM, UNPARSEABLE_RELAY autolearn=no version=3.3.1 Received: from alsa0.perex.cz (localhost [IPv6:::1]) by alsa0.perex.cz (Postfix) with ESMTP id 44327260545; Mon, 26 Jan 2015 11:52:07 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 02FF62604FE; Mon, 26 Jan 2015 11:18:48 +0100 (CET) Received: from mailapp01.imgtec.com (mailapp01.imgtec.com [195.59.15.196]) by alsa0.perex.cz (Postfix) with ESMTP id C3FB62604AE for ; Mon, 26 Jan 2015 11:18:39 +0100 (CET) Received: from KLMAIL01.kl.imgtec.org (unknown [192.168.5.35]) by Websense Email Security Gateway with ESMTPS id 0C8A5A8920703; Mon, 26 Jan 2015 10:18:37 +0000 (GMT) Received: from LEMAIL01.le.imgtec.org (192.168.152.62) by KLMAIL01.kl.imgtec.org (192.168.5.35) with Microsoft SMTP Server (TLS) id 14.3.195.1; Mon, 26 Jan 2015 10:18:38 +0000 Received: from zkakakhel-linux.le.imgtec.org (192.168.154.89) by LEMAIL01.le.imgtec.org (192.168.152.62) with Microsoft SMTP Server (TLS) id 14.3.210.2; Mon, 26 Jan 2015 10:18:37 +0000 From: Zubair Lutfullah Kakakhel To: , Date: Mon, 26 Jan 2015 10:18:28 +0000 Message-ID: <1422267511-6649-2-git-send-email-Zubair.Kakakhel@imgtec.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1422267511-6649-1-git-send-email-Zubair.Kakakhel@imgtec.com> References: <1422267511-6649-1-git-send-email-Zubair.Kakakhel@imgtec.com> MIME-Version: 1.0 X-Originating-IP: [192.168.154.89] X-Mailman-Approved-At: Mon, 26 Jan 2015 11:52:03 +0100 Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, Zubair.Kakakhel@imgtec.com, lgirdwood@gmail.com, linux-kernel@vger.kernel.org, broonie@kernel.org Subject: [alsa-devel] [PATCH 1/4] sound: soc: jz4740: Add dynamic sampling rate support to jz4740-i2s X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP The div clock register is not modified during jz4740_i2s_hw_params. Hence, default sampling rates are actually used regardless of sampling rates input from userspace. This patch adds support to calculate the value of the divider from the parameters passed from userspace and update the relevant div registers Signed-off-by: Zubair Lutfullah Kakakhel --- sound/soc/jz4740/jz4740-i2s.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c index d3d45c6..98c77a63 100644 --- a/sound/soc/jz4740/jz4740-i2s.c +++ b/sound/soc/jz4740/jz4740-i2s.c @@ -77,12 +77,15 @@ #define JZ_AIC_CTRL_INPUT_SAMPLE_SIZE_OFFSET 16 #define JZ_AIC_I2S_FMT_DISABLE_BIT_CLK BIT(12) +#define JZ_AIC_I2S_FMT_DISABLE_BIT_ICLK BIT(13) #define JZ_AIC_I2S_FMT_ENABLE_SYS_CLK BIT(4) #define JZ_AIC_I2S_FMT_MSB BIT(0) #define JZ_AIC_I2S_STATUS_BUSY BIT(2) #define JZ_AIC_CLK_DIV_MASK 0xf +#define I2SDIV_DV_SHIFT 8 +#define I2SDIV_DV_MASK (0xf << I2SDIV_DV_SHIFT) struct jz4740_i2s { struct resource *mem; @@ -237,10 +240,14 @@ static int jz4740_i2s_hw_params(struct snd_pcm_substream *substream, { struct jz4740_i2s *i2s = snd_soc_dai_get_drvdata(dai); unsigned int sample_size; - uint32_t ctrl; + uint32_t ctrl, div_reg; + int div; ctrl = jz4740_i2s_read(i2s, JZ_REG_AIC_CTRL); + div_reg = jz4740_i2s_read(i2s, JZ_REG_AIC_CLK_DIV); + div = clk_get_rate(i2s->clk_i2s) / (64 * params_rate(params)); + switch (params_format(params)) { case SNDRV_PCM_FORMAT_S8: sample_size = 0; @@ -264,7 +271,10 @@ static int jz4740_i2s_hw_params(struct snd_pcm_substream *substream, ctrl |= sample_size << JZ_AIC_CTRL_INPUT_SAMPLE_SIZE_OFFSET; } + div_reg &= ~I2SDIV_DV_MASK; + div_reg |= (div - 1) << I2SDIV_DV_SHIFT; jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl); + jz4740_i2s_write(i2s, JZ_REG_AIC_CLK_DIV, div_reg); return 0; }