diff mbox

[v2,2/4] drm/i915: Re-adjusting rc6 promotional timer for chv

Message ID 1426774469-11170-3-git-send-email-deepak.s@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

deepak.s@linux.intel.com March 19, 2015, 2:14 p.m. UTC
From: Deepak S <deepak.s@linux.intel.com>

After feedback from the hardware team we are changing the RC6
promotional timer to increase the power saving without
changing performance.

Signed-off-by: Deepak S <deepak.s@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Paulo Zanoni March 26, 2015, 9:02 p.m. UTC | #1
2015-03-19 11:14 GMT-03:00  <deepak.s@linux.intel.com>:
> From: Deepak S <deepak.s@linux.intel.com>
>
> After feedback from the hardware team we are changing the RC6
> promotional timer to increase the power saving without
> changing performance.

I was told that my review comments were sent to the previous
submission of this patch. So just to document things, this is what I
wrote:

"I can't really say whether this is really what we want since I didn't
do any measurements, but the patch seems to do what it says, so:
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>"

And Deepak replied that the measurements were done by the hardware team.

Since the patch is the same, the R-B tag still applies.

>
> Signed-off-by: Deepak S <deepak.s@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index e18f0fd..6d04147 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4980,8 +4980,8 @@ static void cherryview_enable_rps(struct drm_device *dev)
>                 I915_WRITE(RING_MAX_IDLE(ring->mmio_base), 10);
>         I915_WRITE(GEN6_RC_SLEEP, 0);
>
> -       /* TO threshold set to 1750 us ( 0x557 * 1.28 us) */
> -       I915_WRITE(GEN6_RC6_THRESHOLD, 0x557);
> +       /* TO threshold set to 500 us ( 0x186 * 1.28 us) */
> +       I915_WRITE(GEN6_RC6_THRESHOLD, 0x186);
>
>         /* allows RC6 residency counter to work */
>         I915_WRITE(VLV_COUNTER_CONTROL,
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
deepak.s@linux.intel.com March 27, 2015, 4:56 a.m. UTC | #2
On Friday 27 March 2015 02:32 AM, Paulo Zanoni wrote:
> 2015-03-19 11:14 GMT-03:00  <deepak.s@linux.intel.com>:
>> From: Deepak S <deepak.s@linux.intel.com>
>>
>> After feedback from the hardware team we are changing the RC6
>> promotional timer to increase the power saving without
>> changing performance.
> I was told that my review comments were sent to the previous
> submission of this patch. So just to document things, this is what I
> wrote:
>
> "I can't really say whether this is really what we want since I didn't
> do any measurements, but the patch seems to do what it says, so:
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>"
>
> And Deepak replied that the measurements were done by the hardware team.
>
> Since the patch is the same, the R-B tag still applies.

Thanks Paulo.

>> Signed-off-by: Deepak S <deepak.s@linux.intel.com>
>> ---
>>   drivers/gpu/drm/i915/intel_pm.c | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>> index e18f0fd..6d04147 100644
>> --- a/drivers/gpu/drm/i915/intel_pm.c
>> +++ b/drivers/gpu/drm/i915/intel_pm.c
>> @@ -4980,8 +4980,8 @@ static void cherryview_enable_rps(struct drm_device *dev)
>>                  I915_WRITE(RING_MAX_IDLE(ring->mmio_base), 10);
>>          I915_WRITE(GEN6_RC_SLEEP, 0);
>>
>> -       /* TO threshold set to 1750 us ( 0x557 * 1.28 us) */
>> -       I915_WRITE(GEN6_RC6_THRESHOLD, 0x557);
>> +       /* TO threshold set to 500 us ( 0x186 * 1.28 us) */
>> +       I915_WRITE(GEN6_RC6_THRESHOLD, 0x186);
>>
>>          /* allows RC6 residency counter to work */
>>          I915_WRITE(VLV_COUNTER_CONTROL,
>> --
>> 1.9.1
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index e18f0fd..6d04147 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4980,8 +4980,8 @@  static void cherryview_enable_rps(struct drm_device *dev)
 		I915_WRITE(RING_MAX_IDLE(ring->mmio_base), 10);
 	I915_WRITE(GEN6_RC_SLEEP, 0);
 
-	/* TO threshold set to 1750 us ( 0x557 * 1.28 us) */
-	I915_WRITE(GEN6_RC6_THRESHOLD, 0x557);
+	/* TO threshold set to 500 us ( 0x186 * 1.28 us) */
+	I915_WRITE(GEN6_RC6_THRESHOLD, 0x186);
 
 	/* allows RC6 residency counter to work */
 	I915_WRITE(VLV_COUNTER_CONTROL,