[09/11] drm/i915: Update compute_baseline_bpp for NV12.
diff mbox

Message ID 1430451795-9657-10-git-send-email-chandra.konduru@intel.com
State New
Headers show

Commit Message

Chandra Konduru May 1, 2015, 3:43 a.m. UTC
This patch updates baseline bpp when primary plane
is running with NV12. It is same as 8-bpc RGB formats
because NV12 also has 8-bits per channel.

Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c |    1 +
 1 file changed, 1 insertion(+)

Comments

Daniel Vetter May 7, 2015, 6:59 a.m. UTC | #1
On Thu, Apr 30, 2015 at 08:43:13PM -0700, Chandra Konduru wrote:
> This patch updates baseline bpp when primary plane
> is running with NV12. It is same as 8-bpc RGB formats
> because NV12 also has 8-bits per channel.
> 
> Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>

This code was removed in

commit d328c9d78d64ca11e744fe227096990430a88477
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Fri Apr 10 16:22:37 2015 +0200

    drm/i915: Select starting pipe bpp irrespective or the primary plane

Please rebase onto latest -nightly before submitting to check for such
things.

Thanks, Daniel
> ---
>  drivers/gpu/drm/i915/intel_display.c |    1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 6e693c4..e747766 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -10845,6 +10845,7 @@ compute_baseline_pipe_bpp(struct intel_crtc *crtc,
>  			return -EINVAL;
>  	case DRM_FORMAT_XRGB8888:
>  	case DRM_FORMAT_ARGB8888:
> +	case DRM_FORMAT_NV12:
>  		bpp = 8*3;
>  		break;
>  	case DRM_FORMAT_XRGB2101010:
> -- 
> 1.7.9.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Chandra Konduru May 7, 2015, 4:01 p.m. UTC | #2
> -----Original Message-----
> From: Daniel Vetter [mailto:daniel.vetter@ffwll.ch] On Behalf Of Daniel Vetter
> Sent: Wednesday, May 06, 2015 11:59 PM
> To: Konduru, Chandra
> Cc: intel-gfx@lists.freedesktop.org; Vetter, Daniel; Syrjala, Ville
> Subject: Re: [Intel-gfx] [PATCH 09/11] drm/i915: Update compute_baseline_bpp
> for NV12.
> 
> On Thu, Apr 30, 2015 at 08:43:13PM -0700, Chandra Konduru wrote:
> > This patch updates baseline bpp when primary plane is running with
> > NV12. It is same as 8-bpc RGB formats because NV12 also has 8-bits per
> > channel.
> >
> > Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>
> 
> This code was removed in
> 
> commit d328c9d78d64ca11e744fe227096990430a88477
> Author: Daniel Vetter <daniel.vetter@ffwll.ch>
> Date:   Fri Apr 10 16:22:37 2015 +0200
> 
>     drm/i915: Select starting pipe bpp irrespective or the primary plane
> 
> Please rebase onto latest -nightly before submitting to check for such things.
Will do. This patch (09/11) can be ignored as we are no more setting baseline
bpp based on pixel format.

> 
> Thanks, Daniel
> > ---
> >  drivers/gpu/drm/i915/intel_display.c |    1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c
> > index 6e693c4..e747766 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -10845,6 +10845,7 @@ compute_baseline_pipe_bpp(struct intel_crtc
> *crtc,
> >  			return -EINVAL;
> >  	case DRM_FORMAT_XRGB8888:
> >  	case DRM_FORMAT_ARGB8888:
> > +	case DRM_FORMAT_NV12:
> >  		bpp = 8*3;
> >  		break;
> >  	case DRM_FORMAT_XRGB2101010:
> > --
> > 1.7.9.5
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch

Patch
diff mbox

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 6e693c4..e747766 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -10845,6 +10845,7 @@  compute_baseline_pipe_bpp(struct intel_crtc *crtc,
 			return -EINVAL;
 	case DRM_FORMAT_XRGB8888:
 	case DRM_FORMAT_ARGB8888:
+	case DRM_FORMAT_NV12:
 		bpp = 8*3;
 		break;
 	case DRM_FORMAT_XRGB2101010: