From patchwork Wed May 6 14:01:30 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniele Ceraolo Spurio X-Patchwork-Id: 6349971 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 4A370BEEE1 for ; Wed, 6 May 2015 14:01:52 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 68CFD20304 for ; Wed, 6 May 2015 14:01:51 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 6E499202F2 for ; Wed, 6 May 2015 14:01:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D7F986E578; Wed, 6 May 2015 07:01:49 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id F04C26E578 for ; Wed, 6 May 2015 07:01:47 -0700 (PDT) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga103.fm.intel.com with ESMTP; 06 May 2015 07:01:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,379,1427785200"; d="scan'208";a="490096391" Received: from dceraolo-linux.isw.intel.com ([10.102.226.43]) by FMSMGA003.fm.intel.com with ESMTP; 06 May 2015 07:01:45 -0700 From: daniele.ceraolospurio@intel.com To: intel-gfx@lists.freedesktop.org Date: Wed, 6 May 2015 15:01:30 +0100 Message-Id: <1430920890-13534-1-git-send-email-daniele.ceraolospurio@intel.com> X-Mailer: git-send-email 1.9.1 Subject: [Intel-gfx] [PATCH v4] [i-g-t] tests/gem_ppgtt: Check for vm leaks with flink and ppgtt X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Daniele Ceraolo Spurio Using imported objects should not leak i915 vmas (and vms). In practice this simulates Xorg importing fbcon and leaking (or not) one vma per Xorg startup cycle. v2: use low-level ioctl wrappers and bo offset to check the leak (Chris) v3: use the flinked bo as batch (Chris) v4: add check on offset, remove unneeded assignments (Chris) Signed-off-by: Tvrtko Ursulin Signed-off-by: Daniele Ceraolo Spurio (v2+) Reviewed-by: Chris Wilson Cc: Chris Wilson Cc: Tvrtko Ursulin --- tests/gem_ppgtt.c | 73 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/tests/gem_ppgtt.c b/tests/gem_ppgtt.c index 5bf773c..d1e484a 100644 --- a/tests/gem_ppgtt.c +++ b/tests/gem_ppgtt.c @@ -48,6 +48,22 @@ #define HEIGHT 512 #define SIZE (HEIGHT*STRIDE) +static bool uses_full_ppgtt(int fd) +{ + struct drm_i915_getparam gp; + int val = 0; + + memset(&gp, 0, sizeof(gp)); + gp.param = 18; /* HAS_ALIASING_PPGTT */ + gp.value = &val; + + if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp)) + return 0; + + errno = 0; + return val > 1; +} + static drm_intel_bo *create_bo(drm_intel_bufmgr *bufmgr, uint32_t pixel) { @@ -200,6 +216,60 @@ static void surfaces_check(dri_bo **bo, int count, uint32_t expected) } } +static uint64_t exec_and_get_offset(int fd, uint32_t batch) +{ + struct drm_i915_gem_execbuffer2 execbuf; + struct drm_i915_gem_exec_object2 exec[1]; + uint32_t batch_data[2] = { MI_BATCH_BUFFER_END }; + + gem_write(fd, batch, 0, batch_data, sizeof(batch_data)); + + memset(exec, 0, sizeof(exec)); + exec[0].handle = batch; + + memset(&execbuf, 0, sizeof(execbuf)); + execbuf.buffers_ptr = (uintptr_t)exec; + execbuf.buffer_count = 1; + + gem_execbuf(fd, &execbuf); + igt_assert_neq(exec[0].offset, -1); + + return exec[0].offset; +} + +static void flink_and_close(void) +{ + uint32_t fd, fd2; + uint32_t bo, flinked_bo, new_bo, name; + uint64_t offset, offset_new; + + fd = drm_open_any(); + igt_require(uses_full_ppgtt(fd)); + + bo = gem_create(fd, 4096); + name = gem_flink(fd, bo); + + fd2 = drm_open_any(); + + flinked_bo = gem_open(fd2, name); + offset = exec_and_get_offset(fd2, flinked_bo); + gem_sync(fd2, flinked_bo); + gem_close(fd2, flinked_bo); + + /* the flinked bo VMA should have been cleared now, so a new bo of the + * same size should get the same offset + */ + new_bo = gem_create(fd2, 4096); + offset_new = exec_and_get_offset(fd2, new_bo); + gem_close(fd2, new_bo); + + igt_assert_eq(offset, offset_new); + + gem_close(fd, bo); + close(fd); + close(fd2); +} + #define N_CHILD 8 int main(int argc, char **argv) { @@ -229,5 +299,8 @@ int main(int argc, char **argv) surfaces_check(rcs, N_CHILD, 0x8000 / N_CHILD); } + igt_subtest("flink-and-close-vma-leak") + flink_and_close(); + igt_exit(); }