| Message ID | 1430972529-26279-2-git-send-email-sonika.jindal@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Thu, May 07, 2015 at 09:52:08AM +0530, Sonika Jindal wrote: > Renaming gen9_rates to skl_rates because other platforms may have different > supported rates. > > Signed-off-by: Sonika Jindal <sonika.jindal@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/intel_dp.c | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 6bd5afb..c9d50d1 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -84,8 +84,8 @@ static const struct dp_link_dpll chv_dpll[] = { > { DP_LINK_BW_5_4, /* m2_int = 27, m2_fraction = 0 */ > { .p1 = 2, .p2 = 1, .n = 1, .m1 = 2, .m2 = 0x6c00000 } } > }; > -/* Skylake supports following rates */ > -static const int gen9_rates[] = { 162000, 216000, 270000, > + > +static const int skl_rates[] = { 162000, 216000, 270000, > 324000, 432000, 540000 }; > static const int chv_rates[] = { 162000, 202500, 210000, 216000, > 243000, 270000, 324000, 405000, > @@ -1161,9 +1161,9 @@ intel_dp_sink_rates(struct intel_dp *intel_dp, const int **sink_rates) > static int > intel_dp_source_rates(struct drm_device *dev, const int **source_rates) > { > - if (INTEL_INFO(dev)->gen >= 9) { > - *source_rates = gen9_rates; > - return ARRAY_SIZE(gen9_rates); > + if (IS_SKYLAKE(dev)) { > + *source_rates = skl_rates; > + return ARRAY_SIZE(skl_rates); > } else if (IS_CHERRYVIEW(dev)) { > *source_rates = chv_rates; > return ARRAY_SIZE(chv_rates); > -- > 1.7.10.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Thu, May 07, 2015 at 11:35:40AM +0300, Ville Syrjälä wrote: > On Thu, May 07, 2015 at 09:52:08AM +0530, Sonika Jindal wrote: > > Renaming gen9_rates to skl_rates because other platforms may have different > > supported rates. > > > > Signed-off-by: Sonika Jindal <sonika.jindal@intel.com> > > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Queued for -next, thanks for the patch. -Daniel
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 6bd5afb..c9d50d1 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -84,8 +84,8 @@ static const struct dp_link_dpll chv_dpll[] = { { DP_LINK_BW_5_4, /* m2_int = 27, m2_fraction = 0 */ { .p1 = 2, .p2 = 1, .n = 1, .m1 = 2, .m2 = 0x6c00000 } } }; -/* Skylake supports following rates */ -static const int gen9_rates[] = { 162000, 216000, 270000, + +static const int skl_rates[] = { 162000, 216000, 270000, 324000, 432000, 540000 }; static const int chv_rates[] = { 162000, 202500, 210000, 216000, 243000, 270000, 324000, 405000, @@ -1161,9 +1161,9 @@ intel_dp_sink_rates(struct intel_dp *intel_dp, const int **sink_rates) static int intel_dp_source_rates(struct drm_device *dev, const int **source_rates) { - if (INTEL_INFO(dev)->gen >= 9) { - *source_rates = gen9_rates; - return ARRAY_SIZE(gen9_rates); + if (IS_SKYLAKE(dev)) { + *source_rates = skl_rates; + return ARRAY_SIZE(skl_rates); } else if (IS_CHERRYVIEW(dev)) { *source_rates = chv_rates; return ARRAY_SIZE(chv_rates);
Renaming gen9_rates to skl_rates because other platforms may have different supported rates. Signed-off-by: Sonika Jindal <sonika.jindal@intel.com> --- drivers/gpu/drm/i915/intel_dp.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)