From patchwork Thu May 7 09:07:13 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 6354791 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 399EBBEEE1 for ; Thu, 7 May 2015 09:08:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4D6D62026F for ; Thu, 7 May 2015 09:08:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5881E2038C for ; Thu, 7 May 2015 09:08:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751855AbbEGJHx (ORCPT ); Thu, 7 May 2015 05:07:53 -0400 Received: from static.88-198-71-155.clients.your-server.de ([88.198.71.155]:38252 "EHLO socrates.bennee.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750889AbbEGJHr (ORCPT ); Thu, 7 May 2015 05:07:47 -0400 Received: from localhost ([127.0.0.1] helo=zen.linaroharston) by socrates.bennee.com with esmtp (Exim 4.80) (envelope-from ) id 1YqJ0u-0003XA-KK; Thu, 07 May 2015 12:26:44 +0200 From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org, marc.zyngier@arm.com, peter.maydell@linaro.org, agraf@suse.de, drjones@redhat.com, pbonzini@redhat.com, zhichao.huang@linaro.org Cc: jan.kiszka@siemens.com, dahi@linux.vnet.ibm.com, r65777@freescale.com, bp@suse.de, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Gleb Natapov , Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v3 10/12] KVM: arm64: trap nested debug register access Date: Thu, 7 May 2015 10:07:13 +0100 Message-Id: <1430989647-22501-3-git-send-email-alex.bennee@linaro.org> X-Mailer: git-send-email 2.3.5 In-Reply-To: <1430929407-3487-1-git-send-email-alex.bennee@linaro.org> References: <1430929407-3487-1-git-send-email-alex.bennee@linaro.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 127.0.0.1 X-SA-Exim-Mail-From: alex.bennee@linaro.org X-SA-Exim-Scanned: No (on socrates.bennee.com); SAEximRunCond expanded to false Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When we are using the hardware registers for guest debug we need to deal with the guests access to them. There is already a mechanism for dealing with these accesses so we build on top of that. - any access to mdscr_el1 is now stored in the mirror location - access to DBG[WB][CV]R continues to go to guest's context There is one register (MDCCINT_EL1) which guest debug doesn't care about so this behaves as before. Signed-off-by: Alex Bennée --- v3 - re-factor for better flow and fall through. - much simpler with debug_ptr (use the guest area as before) - tweak shadow fn to avoid multi-line if diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index a44fb32..7aa3b3a 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -132,7 +132,13 @@ struct kvm_vcpu_arch { * here. */ - /* Guest registers we preserve during guest debugging */ + /* + * Guest registers we preserve during guest debugging. + * + * These shadow registers are updated by the kvm_handle_sys_reg + * trap handler if the guest accesses or updates them while we + * are using guest debug. + */ struct { u32 pstate; u32 mdscr_el1; diff --git a/arch/arm64/kvm/debug.c b/arch/arm64/kvm/debug.c index 1ab63dd..dc8bca8 100644 --- a/arch/arm64/kvm/debug.c +++ b/arch/arm64/kvm/debug.c @@ -50,8 +50,7 @@ static void restore_guest_debug_regs(struct kvm_vcpu *vcpu) { *vcpu_cpsr(vcpu) |= (vcpu->arch.guest_debug_state.pstate & SPSR_DEBUG_MASK); - vcpu_sys_reg(vcpu, MDSCR_EL1) |= - (vcpu->arch.guest_debug_state.mdscr_el1 & MDSCR_EL1_DEBUG_MASK); + vcpu_sys_reg(vcpu, MDSCR_EL1) = vcpu->arch.guest_debug_state.mdscr_el1; } /** diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index c370b40..95f422f 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -196,11 +196,40 @@ static bool trap_dbgauthstatus_el1(struct kvm_vcpu *vcpu, * - If the dirty bit is set, save guest registers, restore host * registers and clear the dirty bit. This ensure that the host can * now use the debug registers. + * + * We also use this mechanism to set-up the debug registers for guest + * debugging. If this is the case we want to ensure the guest sees + * the right versions of the registers - even if they are not going to + * be effective while guest debug is using HW debug. + * */ + +static bool shadow_debug_reg(struct kvm_vcpu *vcpu, + const struct sys_reg_params *p, + const struct sys_reg_desc *r) +{ + /* MDSCR_EL1 */ + if (r->reg == MDSCR_EL1) { + u32 *shadow_mdscr_el1 = &vcpu->arch.guest_debug_state.mdscr_el1; + + if (p->is_write) + *shadow_mdscr_el1 = *vcpu_reg(vcpu, p->Rt); + else + *vcpu_reg(vcpu, p->Rt) = *shadow_mdscr_el1; + + return true; + } + + return false; +} + static bool trap_debug_regs(struct kvm_vcpu *vcpu, const struct sys_reg_params *p, const struct sys_reg_desc *r) { + if (vcpu->guest_debug && shadow_debug_reg(vcpu, p, r)) + return true; + if (p->is_write) { vcpu_sys_reg(vcpu, r->reg) = *vcpu_reg(vcpu, p->Rt); vcpu->arch.debug_flags |= KVM_ARM64_DEBUG_DIRTY;