From patchwork Sat May 16 04:45:43 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhichao Huang X-Patchwork-Id: 6418971 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 2187B9F1C1 for ; Sat, 16 May 2015 04:46:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 22B41203AA for ; Sat, 16 May 2015 04:46:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3436B20204 for ; Sat, 16 May 2015 04:46:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934297AbbEPEqN (ORCPT ); Sat, 16 May 2015 00:46:13 -0400 Received: from mail-pd0-f171.google.com ([209.85.192.171]:32789 "EHLO mail-pd0-f171.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934108AbbEPEqL (ORCPT ); Sat, 16 May 2015 00:46:11 -0400 Received: by pdbqa5 with SMTP id qa5so46305062pdb.0 for ; Fri, 15 May 2015 21:46:10 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=90RP9qCnLDEiMdx4SaM5RMYhmCl2foi7tJXA8UwH/Ew=; b=Tp6dLuMQr2q0byiiWwlPgMtPRS/ApGO15HzasXoZbQDIDk680GKbAIAjkXEL3Zvsbo ve1xhS4axfry4UZ+wtY4OMm0YDzuZNsE7ClAfZnrsoNvjWHQYA0HnabOzpZlT9pbbjed 1ua1MsTfhuL9NKh9Gge02+SeYR5qlxrg985imHlA/yFItyt33nLaaV2PwQifoTVzEj2F 7QBj4P9X539hmi1TJcXu/fTstM6ZxEXDva3w0VfBsDpWpUh/+jt/irhL638FgMBVAGEw 0TL27uaL/7PbMUrgFuvWx8mXQf1WWuTfcSKmV1ip5ksUEXpak0wykbn0dYAHf0nireN0 OCgQ== X-Gm-Message-State: ALoCoQkZ46Eb+JJ6fSS+G8Ih5+LS2CnuaFwAiKSsdbMbRPF0bVGLcFJ5BXkQgp1o9FkSp1RYCkJo X-Received: by 10.70.136.169 with SMTP id qb9mr24424756pdb.46.1431751570812; Fri, 15 May 2015 21:46:10 -0700 (PDT) Received: from localhost ([167.160.116.91]) by mx.google.com with ESMTPSA id ql9sm3360508pbc.65.2015.05.15.21.46.08 (version=TLSv1 cipher=RC4-SHA bits=128/128); Fri, 15 May 2015 21:46:09 -0700 (PDT) From: Zhichao Huang To: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org, marc.zyngier@arm.com, alex.bennee@linaro.org Cc: huangzhichao@huawei.com, Zhichao Huang Subject: [PATCH 02/10] KVM: arm: rename pm_fake handler to trap_raz_wi Date: Sat, 16 May 2015 12:45:43 +0800 Message-Id: <1431751551-4788-3-git-send-email-zhichao.huang@linaro.org> X-Mailer: git-send-email 1.9.5.msysgit.1 In-Reply-To: <1431751551-4788-1-git-send-email-zhichao.huang@linaro.org> References: <1431751551-4788-1-git-send-email-zhichao.huang@linaro.org> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP pm_fake doesn't quite describe what the handler does (ignoring writes and returning 0 for reads). As we're about to use it (a lot) in a different context, rename it with a (admitedly cryptic) name that make sense for all users. Signed-off-by: Zhichao Huang --- arch/arm/kvm/coproc.c | 34 ++++++++++++++++------------------ 1 file changed, 16 insertions(+), 18 deletions(-) diff --git a/arch/arm/kvm/coproc.c b/arch/arm/kvm/coproc.c index 2e12760..9d283d9 100644 --- a/arch/arm/kvm/coproc.c +++ b/arch/arm/kvm/coproc.c @@ -229,7 +229,7 @@ bool access_vm_reg(struct kvm_vcpu *vcpu, * must always support PMCCNTR (the cycle counter): we just RAZ/WI for * all PM registers, which doesn't crash the guest kernel at least. */ -static bool pm_fake(struct kvm_vcpu *vcpu, +static bool trap_raz_wi(struct kvm_vcpu *vcpu, const struct coproc_params *p, const struct coproc_reg *r) { @@ -239,19 +239,19 @@ static bool pm_fake(struct kvm_vcpu *vcpu, return read_zero(vcpu, p); } -#define access_pmcr pm_fake -#define access_pmcntenset pm_fake -#define access_pmcntenclr pm_fake -#define access_pmovsr pm_fake -#define access_pmselr pm_fake -#define access_pmceid0 pm_fake -#define access_pmceid1 pm_fake -#define access_pmccntr pm_fake -#define access_pmxevtyper pm_fake -#define access_pmxevcntr pm_fake -#define access_pmuserenr pm_fake -#define access_pmintenset pm_fake -#define access_pmintenclr pm_fake +#define access_pmcr trap_raz_wi +#define access_pmcntenset trap_raz_wi +#define access_pmcntenclr trap_raz_wi +#define access_pmovsr trap_raz_wi +#define access_pmselr trap_raz_wi +#define access_pmceid0 trap_raz_wi +#define access_pmceid1 trap_raz_wi +#define access_pmccntr trap_raz_wi +#define access_pmxevtyper trap_raz_wi +#define access_pmxevcntr trap_raz_wi +#define access_pmuserenr trap_raz_wi +#define access_pmintenset trap_raz_wi +#define access_pmintenclr trap_raz_wi /* Architected CP15 registers. * CRn denotes the primary register number, but is copied to the CRm in the @@ -532,8 +532,7 @@ int kvm_handle_cp14_64(struct kvm_vcpu *vcpu, struct kvm_run *run) params.Rt2 = (kvm_vcpu_get_hsr(vcpu) >> 10) & 0xf; params.CRm = 0; - /* raz_wi */ - (void)pm_fake(vcpu, ¶ms, NULL); + (void)trap_raz_wi(vcpu, ¶ms, NULL); /* handled */ kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu)); @@ -559,8 +558,7 @@ int kvm_handle_cp14_32(struct kvm_vcpu *vcpu, struct kvm_run *run) params.Op2 = (kvm_vcpu_get_hsr(vcpu) >> 17) & 0x7; params.Rt2 = 0; - /* raz_wi */ - (void)pm_fake(vcpu, ¶ms, NULL); + (void)trap_raz_wi(vcpu, ¶ms, NULL); /* handled */ kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));