From patchwork Sat May 16 04:45:44 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhichao Huang X-Patchwork-Id: 6418981 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 95715C0432 for ; Sat, 16 May 2015 04:46:26 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AE908203AA for ; Sat, 16 May 2015 04:46:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B48C820204 for ; Sat, 16 May 2015 04:46:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934322AbbEPEqV (ORCPT ); Sat, 16 May 2015 00:46:21 -0400 Received: from mail-pd0-f176.google.com ([209.85.192.176]:34362 "EHLO mail-pd0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934198AbbEPEqU (ORCPT ); Sat, 16 May 2015 00:46:20 -0400 Received: by pdeq5 with SMTP id q5so45146041pde.1 for ; Fri, 15 May 2015 21:46:20 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=i5LL6i8n/Xr7JNtaBl2cJ9PrIeAHyz+lt9QgFPr58Yg=; b=kzuHS3WgVRZWIhjAhJ/Ef8TTU8dz3v1N4dRHO4LOHaPKSypDtT+oLjWQVWpR90vY9H 8Y6cMNxlVV5pwXqlEPo2NcAkXSAqY9ElqQSolHSmA0QutGemWwoJ/dCal1zZ4pHISvRW MWVEaIsG7jOUWCyMZcN5wkOb9CIDofrsWaB9a0/hQiBqQLrQYLDN2KaUoYuJzL+T2Qj3 rgUbIXMCLRLt9cMA9Jtk0Yqxx4hcQ2FHsrRwfAeY1sXnQlVtbsyClNIw7Fv3WiOOrer4 LdtPhwfXoOKncqcF7NHUge5cQtz7n2OGRIl28OQqQEd2qg3bstvyIaLqkJp9xM1n+bMq 3gpw== X-Gm-Message-State: ALoCoQn/LXUXQzOiEd66Xu3LlWKxMnALT61QgeBiunHz3TOzPVj5AHYfGbo8IKRJm9WnFGMh9UWH X-Received: by 10.70.96.162 with SMTP id dt2mr24161413pdb.20.1431751580250; Fri, 15 May 2015 21:46:20 -0700 (PDT) Received: from localhost ([167.160.116.91]) by mx.google.com with ESMTPSA id af1sm3384697pad.34.2015.05.15.21.46.17 (version=TLSv1 cipher=RC4-SHA bits=128/128); Fri, 15 May 2015 21:46:19 -0700 (PDT) From: Zhichao Huang To: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org, marc.zyngier@arm.com, alex.bennee@linaro.org Cc: huangzhichao@huawei.com, Zhichao Huang Subject: [PATCH 03/10] KVM: arm: enable to use the ARM_DSCR_MDBGEN macro from KVM assembly code Date: Sat, 16 May 2015 12:45:44 +0800 Message-Id: <1431751551-4788-4-git-send-email-zhichao.huang@linaro.org> X-Mailer: git-send-email 1.9.5.msysgit.1 In-Reply-To: <1431751551-4788-1-git-send-email-zhichao.huang@linaro.org> References: <1431751551-4788-1-git-send-email-zhichao.huang@linaro.org> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add #ifndef __ASSEMBLY__ in hw_breakpoint.h, in order to use the ARM_DSCR_MDBGEN macro from KVM assembly code. Signed-off-by: Zhichao Huang --- arch/arm/include/asm/hw_breakpoint.h | 54 +++++++++++++++++++----------------- 1 file changed, 29 insertions(+), 25 deletions(-) diff --git a/arch/arm/include/asm/hw_breakpoint.h b/arch/arm/include/asm/hw_breakpoint.h index 8e427c7..f2f4c61 100644 --- a/arch/arm/include/asm/hw_breakpoint.h +++ b/arch/arm/include/asm/hw_breakpoint.h @@ -3,6 +3,8 @@ #ifdef __KERNEL__ +#ifndef __ASSEMBLY__ + struct task_struct; #ifdef CONFIG_HAVE_HW_BREAKPOINT @@ -44,6 +46,33 @@ static inline void decode_ctrl_reg(u32 reg, ctrl->mismatch = reg & 0x1; } +struct notifier_block; +struct perf_event; +struct pmu; + +extern struct pmu perf_ops_bp; +extern int arch_bp_generic_fields(struct arch_hw_breakpoint_ctrl ctrl, + int *gen_len, int *gen_type); +extern int arch_check_bp_in_kernelspace(struct perf_event *bp); +extern int arch_validate_hwbkpt_settings(struct perf_event *bp); +extern int hw_breakpoint_exceptions_notify(struct notifier_block *unused, + unsigned long val, void *data); + +extern u8 arch_get_debug_arch(void); +extern u8 arch_get_max_wp_len(void); +extern void clear_ptrace_hw_breakpoint(struct task_struct *tsk); + +int arch_install_hw_breakpoint(struct perf_event *bp); +void arch_uninstall_hw_breakpoint(struct perf_event *bp); +void hw_breakpoint_pmu_read(struct perf_event *bp); +int hw_breakpoint_slots(int type); + +#else +static inline void clear_ptrace_hw_breakpoint(struct task_struct *tsk) {} + +#endif /* CONFIG_HAVE_HW_BREAKPOINT */ +#endif /* __ASSEMBLY */ + /* Debug architecture numbers. */ #define ARM_DEBUG_ARCH_RESERVED 0 /* In case of ptrace ABI updates. */ #define ARM_DEBUG_ARCH_V6 1 @@ -110,30 +139,5 @@ static inline void decode_ctrl_reg(u32 reg, asm volatile("mcr p14, 0, %0, " #N "," #M ", " #OP2 : : "r" (VAL));\ } while (0) -struct notifier_block; -struct perf_event; -struct pmu; - -extern struct pmu perf_ops_bp; -extern int arch_bp_generic_fields(struct arch_hw_breakpoint_ctrl ctrl, - int *gen_len, int *gen_type); -extern int arch_check_bp_in_kernelspace(struct perf_event *bp); -extern int arch_validate_hwbkpt_settings(struct perf_event *bp); -extern int hw_breakpoint_exceptions_notify(struct notifier_block *unused, - unsigned long val, void *data); - -extern u8 arch_get_debug_arch(void); -extern u8 arch_get_max_wp_len(void); -extern void clear_ptrace_hw_breakpoint(struct task_struct *tsk); - -int arch_install_hw_breakpoint(struct perf_event *bp); -void arch_uninstall_hw_breakpoint(struct perf_event *bp); -void hw_breakpoint_pmu_read(struct perf_event *bp); -int hw_breakpoint_slots(int type); - -#else -static inline void clear_ptrace_hw_breakpoint(struct task_struct *tsk) {} - -#endif /* CONFIG_HAVE_HW_BREAKPOINT */ #endif /* __KERNEL__ */ #endif /* _ARM_HW_BREAKPOINT_H */