diff mbox

[4/4] drm/i915/skl: enable WaForceContextSaveRestoreNonCoherent

Message ID 1432037102-12945-4-git-send-email-imre.deak@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Imre Deak May 19, 2015, 12:05 p.m. UTC
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Mika Kuoppala May 19, 2015, 1:08 p.m. UTC | #1
Imre Deak <imre.deak@intel.com> writes:

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 2e342db..0d1522f 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -973,6 +973,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
>  		WA_SET_BIT_MASKED(GEN7_HALF_SLICE_CHICKEN1,
>  			       GEN7_SBE_SS_CACHE_DISPATCH_PORT_SHARING_DISABLE);
>  
> +	/* WaForceContextSaveRestoreNonCoherent:skl,bxt */
> +	WA_SET_BIT_MASKED(HDC_CHICKEN0,
> +			  HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT);
> +

I think we need to also set bit 15 as it looks to be master switch
for this bit.

-Mika


>  	return 0;
>  }
>  
> @@ -1056,10 +1060,6 @@ static int bxt_init_workarounds(struct intel_engine_cs *ring)
>  	WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN,
>  			  STALL_DOP_GATING_DISABLE);
>  
> -	/* WaForceContextSaveRestoreNonCoherent:bxt */
> -	WA_SET_BIT_MASKED(HDC_CHICKEN0,
> -			  HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT);
> -
>  	return 0;
>  }
>  
> -- 
> 2.1.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Imre Deak May 19, 2015, 1:28 p.m. UTC | #2
On ti, 2015-05-19 at 16:08 +0300, Mika Kuoppala wrote:
> Imre Deak <imre.deak@intel.com> writes:
> 
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_ringbuffer.c | 8 ++++----
> >  1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > index 2e342db..0d1522f 100644
> > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > @@ -973,6 +973,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
> >  		WA_SET_BIT_MASKED(GEN7_HALF_SLICE_CHICKEN1,
> >  			       GEN7_SBE_SS_CACHE_DISPATCH_PORT_SHARING_DISABLE);
> >  
> > +	/* WaForceContextSaveRestoreNonCoherent:skl,bxt */
> > +	WA_SET_BIT_MASKED(HDC_CHICKEN0,
> > +			  HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT);
> > +
> 
> I think we need to also set bit 15 as it looks to be master switch
> for this bit.

Yes, thanks for catching it.

--Imre
Shuang He May 21, 2015, 7:45 a.m. UTC | #3
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6433
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                                  234/234              234/234
ILK                                  262/262              262/262
SNB                 -1              282/282              281/282
IVB                                  300/300              300/300
BYT                                  254/254              254/254
BDW                                  275/275              275/275
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
 SNB  igt@pm_rpm@dpms-mode-unset-non-lpsp      DMESG_WARN(10)PASS(1)      DMESG_WARN(1)
(dmesg patch applied)WARNING:at_drivers/gpu/drm/i915/intel_uncore.c:#assert_device_not_suspended[i915]()@WARNING:.* at .* assert_device_not_suspended+0x
Note: You need to pay more attention to line start with '*'
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 2e342db..0d1522f 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -973,6 +973,10 @@  static int gen9_init_workarounds(struct intel_engine_cs *ring)
 		WA_SET_BIT_MASKED(GEN7_HALF_SLICE_CHICKEN1,
 			       GEN7_SBE_SS_CACHE_DISPATCH_PORT_SHARING_DISABLE);
 
+	/* WaForceContextSaveRestoreNonCoherent:skl,bxt */
+	WA_SET_BIT_MASKED(HDC_CHICKEN0,
+			  HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT);
+
 	return 0;
 }
 
@@ -1056,10 +1060,6 @@  static int bxt_init_workarounds(struct intel_engine_cs *ring)
 	WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN,
 			  STALL_DOP_GATING_DISABLE);
 
-	/* WaForceContextSaveRestoreNonCoherent:bxt */
-	WA_SET_BIT_MASKED(HDC_CHICKEN0,
-			  HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT);
-
 	return 0;
 }