diff mbox

[49/88] drm/amdgpu: remove AMDGPU_GEM_CREATE_CPU_GTT_UC

Message ID 1432696827-3752-19-git-send-email-alexander.deucher@amd.com (mailing list archive)
State New, archived
Headers show

Commit Message

Alex Deucher May 27, 2015, 3:19 a.m. UTC
From: Jammy Zhou <Jammy.Zhou@amd.com>

This flag isn't used by user mode drivers, remove it to avoid
confusion. And rename GTT_WC to GTT_USWC to make it clear.

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 10 ++--------
 include/uapi/drm/amdgpu_drm.h              |  7 ++-----
 2 files changed, 4 insertions(+), 13 deletions(-)

Comments

Oded Gabbay June 6, 2015, 5:08 p.m. UTC | #1
Hi Alex,
I think you have a mistake in this patch.
You renamed AMDGPU_GEM_CREATE_CPU_GTT_WC to AMDGPU_GEM_CREATE_CPU_GTT_USWC,
however, AMDGPU_GEM_CREATE_CPU_GTT_WC was defined as (1 << 3) and
AMDGPU_GEM_CREATE_CPU_GTT_USWC is defined as (1 << 2)

Oded

On Wed, May 27, 2015 at 6:22 AM Alex Deucher <alexdeucher@gmail.com> wrote:

> From: Jammy Zhou <Jammy.Zhou@amd.com>
>
> This flag isn't used by user mode drivers, remove it to avoid
> confusion. And rename GTT_WC to GTT_USWC to make it clear.
>
> Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 10 ++--------
>  include/uapi/drm/amdgpu_drm.h              |  7 ++-----
>  2 files changed, 4 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index f5e17f9..992b7f5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -132,10 +132,7 @@ void amdgpu_ttm_placement_from_domain(struct
> amdgpu_bo *rbo, u32 domain)
>         }
>
>         if (domain & AMDGPU_GEM_DOMAIN_GTT) {
> -               if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_UC) {
> -                       rbo->placements[c].fpfn = 0;
> -                       rbo->placements[c++].flags = TTM_PL_FLAG_UNCACHED
> | TTM_PL_FLAG_TT;
> -               } else if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_WC) {
> +               if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) {
>                         rbo->placements[c].fpfn = 0;
>                         rbo->placements[c++].flags = TTM_PL_FLAG_WC |
> TTM_PL_FLAG_TT |
>
>        TTM_PL_FLAG_UNCACHED;
> @@ -146,10 +143,7 @@ void amdgpu_ttm_placement_from_domain(struct
> amdgpu_bo *rbo, u32 domain)
>         }
>
>         if (domain & AMDGPU_GEM_DOMAIN_CPU) {
> -               if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_UC) {
> -                       rbo->placements[c].fpfn = 0;
> -                       rbo->placements[c++].flags =  TTM_PL_FLAG_UNCACHED
> | TTM_PL_FLAG_SYSTEM;
> -               } else if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_WC) {
> +               if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) {
>                         rbo->placements[c].fpfn = 0;
>                         rbo->placements[c++].flags = TTM_PL_FLAG_WC |
> TTM_PL_FLAG_SYSTEM |
>
>        TTM_PL_FLAG_UNCACHED;
> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
> index 9e771fb..77bc574 100644
> --- a/include/uapi/drm/amdgpu_drm.h
> +++ b/include/uapi/drm/amdgpu_drm.h
> @@ -73,15 +73,12 @@
>  #define AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED  (1 << 0)
>  /* Flag that CPU access will not work, this VRAM domain is invisible */
>  #define AMDGPU_GEM_CREATE_NO_CPU_ACCESS                (1 << 1)
> -/* Flag that un-cached attributes should be used for GTT */
> -#define AMDGPU_GEM_CREATE_CPU_GTT_UC           (1 << 2)
>  /* Flag that USWC attributes should be used for GTT */
> -#define AMDGPU_GEM_CREATE_CPU_GTT_WC           (1 << 3)
> +#define AMDGPU_GEM_CREATE_CPU_GTT_USWC         (1 << 2)
>
>  /* Flag mask for GTT domain_flags */
>  #define AMDGPU_GEM_CREATE_CPU_GTT_MASK \
> -       (AMDGPU_GEM_CREATE_CPU_GTT_WC | \
> -        AMDGPU_GEM_CREATE_CPU_GTT_UC | \
> +       (AMDGPU_GEM_CREATE_CPU_GTT_USWC | \
>          AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED | \
>          AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
>
> --
> 1.8.3.1
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel
>
Christian König June 6, 2015, 7:09 p.m. UTC | #2
On 06.06.2015 19:08, Oded Gabbay wrote:
> Hi Alex,
> I think you have a mistake in this patch.
> You renamed AMDGPU_GEM_CREATE_CPU_GTT_WC to 
> AMDGPU_GEM_CREATE_CPU_GTT_USWC, however, AMDGPU_GEM_CREATE_CPU_GTT_WC 
> was defined as (1 << 3) and AMDGPU_GEM_CREATE_CPU_GTT_USWC is defined 
> as (1 << 2)

That patch merged AMDGPU_GEM_CREATE_CPU_GTT_WC and 
AMDGPU_GEM_CREATE_CPU_GTT_UC to AMDGPU_GEM_CREATE_CPU_GTT_USWC.

So using 1 << 2 for the new value is perfectly fine.

Christian.

>
> Oded
>
> On Wed, May 27, 2015 at 6:22 AM Alex Deucher <alexdeucher@gmail.com 
> <mailto:alexdeucher@gmail.com>> wrote:
>
>     From: Jammy Zhou <Jammy.Zhou@amd.com <mailto:Jammy.Zhou@amd.com>>
>
>     This flag isn't used by user mode drivers, remove it to avoid
>     confusion. And rename GTT_WC to GTT_USWC to make it clear.
>
>     Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com
>     <mailto:Jammy.Zhou@amd.com>>
>     Reviewed-by: Alex Deucher <alexander.deucher@amd.com
>     <mailto:alexander.deucher@amd.com>>
>     ---
>      drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 10 ++--------
>      include/uapi/drm/amdgpu_drm.h              |  7 ++-----
>      2 files changed, 4 insertions(+), 13 deletions(-)
>
>     diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>     b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>     index f5e17f9..992b7f5 100644
>     --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>     +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>     @@ -132,10 +132,7 @@ void amdgpu_ttm_placement_from_domain(struct
>     amdgpu_bo *rbo, u32 domain)
>             }
>
>             if (domain & AMDGPU_GEM_DOMAIN_GTT) {
>     -               if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_UC) {
>     -                       rbo->placements[c].fpfn = 0;
>     -                       rbo->placements[c++].flags =
>     TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_TT;
>     -               } else if (rbo->flags &
>     AMDGPU_GEM_CREATE_CPU_GTT_WC) {
>     +               if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) {
>                             rbo->placements[c].fpfn = 0;
>                             rbo->placements[c++].flags =
>     TTM_PL_FLAG_WC | TTM_PL_FLAG_TT |
>                        TTM_PL_FLAG_UNCACHED;
>     @@ -146,10 +143,7 @@ void amdgpu_ttm_placement_from_domain(struct
>     amdgpu_bo *rbo, u32 domain)
>             }
>
>             if (domain & AMDGPU_GEM_DOMAIN_CPU) {
>     -               if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_UC) {
>     -                       rbo->placements[c].fpfn = 0;
>     -                       rbo->placements[c++].flags =
>     TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_SYSTEM;
>     -               } else if (rbo->flags &
>     AMDGPU_GEM_CREATE_CPU_GTT_WC) {
>     +               if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) {
>                             rbo->placements[c].fpfn = 0;
>                             rbo->placements[c++].flags =
>     TTM_PL_FLAG_WC | TTM_PL_FLAG_SYSTEM |
>                        TTM_PL_FLAG_UNCACHED;
>     diff --git a/include/uapi/drm/amdgpu_drm.h
>     b/include/uapi/drm/amdgpu_drm.h
>     index 9e771fb..77bc574 100644
>     --- a/include/uapi/drm/amdgpu_drm.h
>     +++ b/include/uapi/drm/amdgpu_drm.h
>     @@ -73,15 +73,12 @@
>      #define AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED  (1 << 0)
>      /* Flag that CPU access will not work, this VRAM domain is
>     invisible */
>      #define AMDGPU_GEM_CREATE_NO_CPU_ACCESS                (1 << 1)
>     -/* Flag that un-cached attributes should be used for GTT */
>     -#define AMDGPU_GEM_CREATE_CPU_GTT_UC           (1 << 2)
>      /* Flag that USWC attributes should be used for GTT */
>     -#define AMDGPU_GEM_CREATE_CPU_GTT_WC           (1 << 3)
>     +#define AMDGPU_GEM_CREATE_CPU_GTT_USWC         (1 << 2)
>
>      /* Flag mask for GTT domain_flags */
>      #define AMDGPU_GEM_CREATE_CPU_GTT_MASK \
>     -       (AMDGPU_GEM_CREATE_CPU_GTT_WC | \
>     -        AMDGPU_GEM_CREATE_CPU_GTT_UC | \
>     +       (AMDGPU_GEM_CREATE_CPU_GTT_USWC | \
>              AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED | \
>              AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
>
>     --
>     1.8.3.1
>
>     _______________________________________________
>     dri-devel mailing list
>     dri-devel@lists.freedesktop.org
>     <mailto:dri-devel@lists.freedesktop.org>
>     http://lists.freedesktop.org/mailman/listinfo/dri-devel
>
>
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel
Oded Gabbay June 6, 2015, 7:32 p.m. UTC | #3
On Sat, Jun 6, 2015 at 10:09 PM, Christian König
<deathsimple@vodafone.de> wrote:
> On 06.06.2015 19:08, Oded Gabbay wrote:
>
> Hi Alex,
> I think you have a mistake in this patch.
> You renamed AMDGPU_GEM_CREATE_CPU_GTT_WC to AMDGPU_GEM_CREATE_CPU_GTT_USWC,
> however, AMDGPU_GEM_CREATE_CPU_GTT_WC was defined as (1 << 3) and
> AMDGPU_GEM_CREATE_CPU_GTT_USWC is defined as (1 << 2)
>
>
> That patch merged AMDGPU_GEM_CREATE_CPU_GTT_WC and
> AMDGPU_GEM_CREATE_CPU_GTT_UC to AMDGPU_GEM_CREATE_CPU_GTT_USWC.
>
> So using 1 << 2 for the new value is perfectly fine.
>
> Christian.
>
Yeah, I see it now.
False alarm.

Oded
>
>
> Oded
>
> On Wed, May 27, 2015 at 6:22 AM Alex Deucher <alexdeucher@gmail.com> wrote:
>>
>> From: Jammy Zhou <Jammy.Zhou@amd.com>
>>
>> This flag isn't used by user mode drivers, remove it to avoid
>> confusion. And rename GTT_WC to GTT_USWC to make it clear.
>>
>> Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
>> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
>> ---
>>  drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 10 ++--------
>>  include/uapi/drm/amdgpu_drm.h              |  7 ++-----
>>  2 files changed, 4 insertions(+), 13 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> index f5e17f9..992b7f5 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> @@ -132,10 +132,7 @@ void amdgpu_ttm_placement_from_domain(struct
>> amdgpu_bo *rbo, u32 domain)
>>         }
>>
>>         if (domain & AMDGPU_GEM_DOMAIN_GTT) {
>> -               if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_UC) {
>> -                       rbo->placements[c].fpfn = 0;
>> -                       rbo->placements[c++].flags = TTM_PL_FLAG_UNCACHED
>> | TTM_PL_FLAG_TT;
>> -               } else if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_WC) {
>> +               if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) {
>>                         rbo->placements[c].fpfn = 0;
>>                         rbo->placements[c++].flags = TTM_PL_FLAG_WC |
>> TTM_PL_FLAG_TT |
>>
>> TTM_PL_FLAG_UNCACHED;
>> @@ -146,10 +143,7 @@ void amdgpu_ttm_placement_from_domain(struct
>> amdgpu_bo *rbo, u32 domain)
>>         }
>>
>>         if (domain & AMDGPU_GEM_DOMAIN_CPU) {
>> -               if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_UC) {
>> -                       rbo->placements[c].fpfn = 0;
>> -                       rbo->placements[c++].flags =  TTM_PL_FLAG_UNCACHED
>> | TTM_PL_FLAG_SYSTEM;
>> -               } else if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_WC) {
>> +               if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) {
>>                         rbo->placements[c].fpfn = 0;
>>                         rbo->placements[c++].flags = TTM_PL_FLAG_WC |
>> TTM_PL_FLAG_SYSTEM |
>>
>> TTM_PL_FLAG_UNCACHED;
>> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
>> index 9e771fb..77bc574 100644
>> --- a/include/uapi/drm/amdgpu_drm.h
>> +++ b/include/uapi/drm/amdgpu_drm.h
>> @@ -73,15 +73,12 @@
>>  #define AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED  (1 << 0)
>>  /* Flag that CPU access will not work, this VRAM domain is invisible */
>>  #define AMDGPU_GEM_CREATE_NO_CPU_ACCESS                (1 << 1)
>> -/* Flag that un-cached attributes should be used for GTT */
>> -#define AMDGPU_GEM_CREATE_CPU_GTT_UC           (1 << 2)
>>  /* Flag that USWC attributes should be used for GTT */
>> -#define AMDGPU_GEM_CREATE_CPU_GTT_WC           (1 << 3)
>> +#define AMDGPU_GEM_CREATE_CPU_GTT_USWC         (1 << 2)
>>
>>  /* Flag mask for GTT domain_flags */
>>  #define AMDGPU_GEM_CREATE_CPU_GTT_MASK \
>> -       (AMDGPU_GEM_CREATE_CPU_GTT_WC | \
>> -        AMDGPU_GEM_CREATE_CPU_GTT_UC | \
>> +       (AMDGPU_GEM_CREATE_CPU_GTT_USWC | \
>>          AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED | \
>>          AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
>>
>> --
>> 1.8.3.1
>>
>> _______________________________________________
>> dri-devel mailing list
>> dri-devel@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/dri-devel
>
>
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel
>
>
Emil Velikov June 12, 2015, 3:47 p.m. UTC | #4
On 27 May 2015 at 04:19, Alex Deucher <alexdeucher@gmail.com> wrote:
> From: Jammy Zhou <Jammy.Zhou@amd.com>
>
> This flag isn't used by user mode drivers, remove it to avoid
> confusion. And rename GTT_WC to GTT_USWC to make it clear.
>
Just a wild question:
Assuming that user mode drivers means UMS, does this mean that there
will be such drivers in the future ? Or is that what's the nature of
the proprietary/binary drivers ?

Thanks
Emil
Bridgman, John June 12, 2015, 4:41 p.m. UTC | #5

Emil Velikov June 12, 2015, 4:57 p.m. UTC | #6
On 12 June 2015 at 17:41, Bridgman, John <John.Bridgman@amd.com> wrote:
> ________________________________________
> From: dri-devel [dri-devel-bounces@lists.freedesktop.org] on behalf of Emil Velikov [emil.l.velikov@gmail.com]
> Sent: June 12, 2015 11:47 AM
> To: Alex Deucher
> Cc: ML dri-devel
> Subject: Re: [PATCH 49/88] drm/amdgpu: remove AMDGPU_GEM_CREATE_CPU_GTT_UC
>
> On 27 May 2015 at 04:19, Alex Deucher <alexdeucher@gmail.com> wrote:
>> From: Jammy Zhou <Jammy.Zhou@amd.com>
>>
>> This flag isn't used by user mode drivers, remove it to avoid
>> confusion. And rename GTT_WC to GTT_USWC to make it clear.
>>
> -Just a wild question:
> -Assuming that user mode drivers means UMS, does this mean that there
> -will be such drivers in the future ? Or is that what's the nature of
> -the proprietary/binary drivers ?
>
> I believe "user mode drivers" in this context means open or closed source GL drivers. The plan is to always use open source X driver and KMS.
>
Great. Thanks for the clarification !

-Emil
diff mbox

Patch

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index f5e17f9..992b7f5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -132,10 +132,7 @@  void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *rbo, u32 domain)
 	}
 
 	if (domain & AMDGPU_GEM_DOMAIN_GTT) {
-		if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_UC) {
-			rbo->placements[c].fpfn = 0;
-			rbo->placements[c++].flags = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_TT;
-		} else if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_WC) {
+		if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) {
 			rbo->placements[c].fpfn = 0;
 			rbo->placements[c++].flags = TTM_PL_FLAG_WC | TTM_PL_FLAG_TT |
 										 TTM_PL_FLAG_UNCACHED;
@@ -146,10 +143,7 @@  void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *rbo, u32 domain)
 	}
 
 	if (domain & AMDGPU_GEM_DOMAIN_CPU) {
-		if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_UC) {
-			rbo->placements[c].fpfn = 0;
-			rbo->placements[c++].flags =  TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_SYSTEM;
-		} else if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_WC) {
+		if (rbo->flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) {
 			rbo->placements[c].fpfn = 0;
 			rbo->placements[c++].flags = TTM_PL_FLAG_WC | TTM_PL_FLAG_SYSTEM |
 										 TTM_PL_FLAG_UNCACHED;
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 9e771fb..77bc574 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -73,15 +73,12 @@ 
 #define AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED	(1 << 0)
 /* Flag that CPU access will not work, this VRAM domain is invisible */
 #define AMDGPU_GEM_CREATE_NO_CPU_ACCESS		(1 << 1)
-/* Flag that un-cached attributes should be used for GTT */
-#define AMDGPU_GEM_CREATE_CPU_GTT_UC		(1 << 2)
 /* Flag that USWC attributes should be used for GTT */
-#define AMDGPU_GEM_CREATE_CPU_GTT_WC		(1 << 3)
+#define AMDGPU_GEM_CREATE_CPU_GTT_USWC		(1 << 2)
 
 /* Flag mask for GTT domain_flags */
 #define AMDGPU_GEM_CREATE_CPU_GTT_MASK \
-	(AMDGPU_GEM_CREATE_CPU_GTT_WC | \
-	 AMDGPU_GEM_CREATE_CPU_GTT_UC | \
+	(AMDGPU_GEM_CREATE_CPU_GTT_USWC | \
 	 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED | \
 	 AMDGPU_GEM_CREATE_NO_CPU_ACCESS)