diff mbox

[RFC,07/14] drm/i915: Disable MIPI display self refresh mode

Message ID 1432895827-5185-8-git-send-email-gaurav.k.singh@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Gaurav K Singh May 29, 2015, 10:36 a.m. UTC
During disable sequence for MIPI encoder in command mode, disable
MIPI display self-refresh mode bit in Pipe Ctrl reg.

Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohan.marimuthu@intel.com>
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c |   13 +++++++++++++
 1 file changed, 13 insertions(+)

Comments

Daniel Vetter May 29, 2015, 5:16 p.m. UTC | #1
On Fri, May 29, 2015 at 04:06:59PM +0530, Gaurav K Singh wrote:
> During disable sequence for MIPI encoder in command mode, disable
> MIPI display self-refresh mode bit in Pipe Ctrl reg.
> 
> Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
> Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohan.marimuthu@intel.com>
> Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c |   13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 895d7c7..cab2ac8 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2171,6 +2171,9 @@ static void intel_enable_pipe(struct intel_crtc *crtc)
>  static void intel_disable_pipe(struct intel_crtc *crtc)
>  {
>  	struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
> +	struct intel_encoder *encoder;
> +	struct intel_dsi *intel_dsi;
> +	struct drm_device *dev = crtc->base.dev;
>  	enum transcoder cpu_transcoder = crtc->config->cpu_transcoder;
>  	enum pipe pipe = crtc->pipe;
>  	int reg;
> @@ -2189,6 +2192,16 @@ static void intel_disable_pipe(struct intel_crtc *crtc)
>  	if ((val & PIPECONF_ENABLE) == 0)
>  		return;
>  
> +	for_each_encoder_on_crtc(dev, &crtc->base, encoder) {
> +		if (encoder->type == INTEL_OUTPUT_DSI) {
> +			intel_dsi = enc_to_intel_dsi(&encoder->base);
> +			if (intel_dsi && (intel_dsi->operation_mode ==
> +						INTEL_DSI_COMMAND_MODE))
> +				val = val & ~PIPECONF_MIPI_DSR_ENABLE;
> +			break;
> +		}
> +	}

This must be moved into a suitable encoder callback. Yes the ddi code is
full of cases where encoder stuff is done from the generic crtc code. But
we now have 2 completely different kinds of ports on bxt (ddi and dsi),
and we need to get some solid structure into the code again.
-Daniel

> +
>  	/*
>  	 * Double wide has implications for planes
>  	 * so best keep it disabled when not needed.
> -- 
> 1.7.9.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Daniel Vetter May 29, 2015, 5:20 p.m. UTC | #2
On Fri, May 29, 2015 at 07:16:36PM +0200, Daniel Vetter wrote:
> On Fri, May 29, 2015 at 04:06:59PM +0530, Gaurav K Singh wrote:
> > During disable sequence for MIPI encoder in command mode, disable
> > MIPI display self-refresh mode bit in Pipe Ctrl reg.
> > 
> > Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
> > Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohan.marimuthu@intel.com>
> > Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_display.c |   13 +++++++++++++
> >  1 file changed, 13 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 895d7c7..cab2ac8 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -2171,6 +2171,9 @@ static void intel_enable_pipe(struct intel_crtc *crtc)
> >  static void intel_disable_pipe(struct intel_crtc *crtc)
> >  {
> >  	struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
> > +	struct intel_encoder *encoder;
> > +	struct intel_dsi *intel_dsi;
> > +	struct drm_device *dev = crtc->base.dev;
> >  	enum transcoder cpu_transcoder = crtc->config->cpu_transcoder;
> >  	enum pipe pipe = crtc->pipe;
> >  	int reg;
> > @@ -2189,6 +2192,16 @@ static void intel_disable_pipe(struct intel_crtc *crtc)
> >  	if ((val & PIPECONF_ENABLE) == 0)
> >  		return;
> >  
> > +	for_each_encoder_on_crtc(dev, &crtc->base, encoder) {
> > +		if (encoder->type == INTEL_OUTPUT_DSI) {
> > +			intel_dsi = enc_to_intel_dsi(&encoder->base);
> > +			if (intel_dsi && (intel_dsi->operation_mode ==
> > +						INTEL_DSI_COMMAND_MODE))
> > +				val = val & ~PIPECONF_MIPI_DSR_ENABLE;
> > +			break;
> > +		}
> > +	}
> 
> This must be moved into a suitable encoder callback. Yes the ddi code is
> full of cases where encoder stuff is done from the generic crtc code. But
> we now have 2 completely different kinds of ports on bxt (ddi and dsi),
> and we need to get some solid structure into the code again.

Ah I missed that this is a pipeconf thing. Unconditionally clearing this
bit will achieve the same, without the need to loop over connectors.
-Daniel
Gaurav K Singh June 16, 2015, 4:59 p.m. UTC | #3
On 5/29/2015 10:50 PM, Daniel Vetter wrote:
> On Fri, May 29, 2015 at 07:16:36PM +0200, Daniel Vetter wrote:
>> On Fri, May 29, 2015 at 04:06:59PM +0530, Gaurav K Singh wrote:
>>> During disable sequence for MIPI encoder in command mode, disable
>>> MIPI display self-refresh mode bit in Pipe Ctrl reg.
>>>
>>> Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
>>> Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohan.marimuthu@intel.com>
>>> Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
>>> ---
>>>   drivers/gpu/drm/i915/intel_display.c |   13 +++++++++++++
>>>   1 file changed, 13 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>>> index 895d7c7..cab2ac8 100644
>>> --- a/drivers/gpu/drm/i915/intel_display.c
>>> +++ b/drivers/gpu/drm/i915/intel_display.c
>>> @@ -2171,6 +2171,9 @@ static void intel_enable_pipe(struct intel_crtc *crtc)
>>>   static void intel_disable_pipe(struct intel_crtc *crtc)
>>>   {
>>>   	struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
>>> +	struct intel_encoder *encoder;
>>> +	struct intel_dsi *intel_dsi;
>>> +	struct drm_device *dev = crtc->base.dev;
>>>   	enum transcoder cpu_transcoder = crtc->config->cpu_transcoder;
>>>   	enum pipe pipe = crtc->pipe;
>>>   	int reg;
>>> @@ -2189,6 +2192,16 @@ static void intel_disable_pipe(struct intel_crtc *crtc)
>>>   	if ((val & PIPECONF_ENABLE) == 0)
>>>   		return;
>>>   
>>> +	for_each_encoder_on_crtc(dev, &crtc->base, encoder) {
>>> +		if (encoder->type == INTEL_OUTPUT_DSI) {
>>> +			intel_dsi = enc_to_intel_dsi(&encoder->base);
>>> +			if (intel_dsi && (intel_dsi->operation_mode ==
>>> +						INTEL_DSI_COMMAND_MODE))
>>> +				val = val & ~PIPECONF_MIPI_DSR_ENABLE;
>>> +			break;
>>> +		}
>>> +	}
>> This must be moved into a suitable encoder callback. Yes the ddi code is
>> full of cases where encoder stuff is done from the generic crtc code. But
>> we now have 2 completely different kinds of ports on bxt (ddi and dsi),
>> and we need to get some solid structure into the code again.
> Ah I missed that this is a pipeconf thing. Unconditionally clearing this
> bit will achieve the same, without the need to loop over connectors.
> -Daniel
Agree with you. Instead of loop over the encoders, will set up the state 
flag and will use it here.
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 895d7c7..cab2ac8 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2171,6 +2171,9 @@  static void intel_enable_pipe(struct intel_crtc *crtc)
 static void intel_disable_pipe(struct intel_crtc *crtc)
 {
 	struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
+	struct intel_encoder *encoder;
+	struct intel_dsi *intel_dsi;
+	struct drm_device *dev = crtc->base.dev;
 	enum transcoder cpu_transcoder = crtc->config->cpu_transcoder;
 	enum pipe pipe = crtc->pipe;
 	int reg;
@@ -2189,6 +2192,16 @@  static void intel_disable_pipe(struct intel_crtc *crtc)
 	if ((val & PIPECONF_ENABLE) == 0)
 		return;
 
+	for_each_encoder_on_crtc(dev, &crtc->base, encoder) {
+		if (encoder->type == INTEL_OUTPUT_DSI) {
+			intel_dsi = enc_to_intel_dsi(&encoder->base);
+			if (intel_dsi && (intel_dsi->operation_mode ==
+						INTEL_DSI_COMMAND_MODE))
+				val = val & ~PIPECONF_MIPI_DSR_ENABLE;
+			break;
+		}
+	}
+
 	/*
 	 * Double wide has implications for planes
 	 * so best keep it disabled when not needed.