diff mbox

drm/i915: Include G4X/VLV/CHV in self refresh status

Message ID 1433243867-20976-1-git-send-email-ander.conselvan.de.oliveira@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ander Conselvan de Oliveira June 2, 2015, 11:17 a.m. UTC
Add all missing platforms handled by intel_set_memory_cxsr() to the
i915_sr_status debugfs entry.

v2: Add G4X too. (Ville)
    Clarify the change also affects CHV. (Ander)

References: https://bugs.freedesktop.org/show_bug.cgi?id=89792
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

Comments

Ville Syrjälä June 2, 2015, 11:51 a.m. UTC | #1
On Tue, Jun 02, 2015 at 02:17:47PM +0300, Ander Conselvan de Oliveira wrote:
> Add all missing platforms handled by intel_set_memory_cxsr() to the
> i915_sr_status debugfs entry.
> 
> v2: Add G4X too. (Ville)
>     Clarify the change also affects CHV. (Ander)
> 
> References: https://bugs.freedesktop.org/show_bug.cgi?id=89792
> Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>

It's a good enough white lie for my taste. 
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

I would also accept removing the entire file, but we can keep it if
people find some use for it.

> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index fece922..564a6ba 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1725,12 +1725,15 @@ static int i915_sr_status(struct seq_file *m, void *unused)
>  
>  	if (HAS_PCH_SPLIT(dev))
>  		sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
> -	else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
> +	else if (IS_CRESTLINE(dev) || IS_G4X(dev) ||
> +		 IS_I945G(dev) || IS_I945GM(dev))
>  		sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
>  	else if (IS_I915GM(dev))
>  		sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
>  	else if (IS_PINEVIEW(dev))
>  		sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
> +	else if (IS_VALLEYVIEW(dev))
> +		sr_enabled = I915_READ(FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
>  
>  	intel_runtime_pm_put(dev_priv);
>  
> -- 
> 2.1.0
Jani Nikula June 2, 2015, 11:58 a.m. UTC | #2
On Tue, 02 Jun 2015, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Tue, Jun 02, 2015 at 02:17:47PM +0300, Ander Conselvan de Oliveira wrote:
>> Add all missing platforms handled by intel_set_memory_cxsr() to the
>> i915_sr_status debugfs entry.
>> 
>> v2: Add G4X too. (Ville)
>>     Clarify the change also affects CHV. (Ander)
>> 
>> References: https://bugs.freedesktop.org/show_bug.cgi?id=89792
>> Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
>
> It's a good enough white lie for my taste. 
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> I would also accept removing the entire file, but we can keep it if
> people find some use for it.

This doesn't do anything for skl, but the bug report is (also) about
skl.

BR,
Jani.


>
>> ---
>>  drivers/gpu/drm/i915/i915_debugfs.c | 5 ++++-
>>  1 file changed, 4 insertions(+), 1 deletion(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
>> index fece922..564a6ba 100644
>> --- a/drivers/gpu/drm/i915/i915_debugfs.c
>> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
>> @@ -1725,12 +1725,15 @@ static int i915_sr_status(struct seq_file *m, void *unused)
>>  
>>  	if (HAS_PCH_SPLIT(dev))
>>  		sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
>> -	else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
>> +	else if (IS_CRESTLINE(dev) || IS_G4X(dev) ||
>> +		 IS_I945G(dev) || IS_I945GM(dev))
>>  		sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
>>  	else if (IS_I915GM(dev))
>>  		sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
>>  	else if (IS_PINEVIEW(dev))
>>  		sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
>> +	else if (IS_VALLEYVIEW(dev))
>> +		sr_enabled = I915_READ(FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
>>  
>>  	intel_runtime_pm_put(dev_priv);
>>  
>> -- 
>> 2.1.0
>
> -- 
> Ville Syrjälä
> Intel OTC
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Shuang He June 2, 2015, 5:46 p.m. UTC | #3
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6522
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                                  276/276              276/276
ILK                                  303/303              303/303
SNB                 -1              315/315              314/315
IVB                                  343/343              343/343
BYT                                  287/287              287/287
BDW                                  321/321              321/321
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*SNB  igt@pm_rpm@dpms-mode-unset-non-lpsp      PASS(1)      DMESG_WARN(1)
(dmesg patch applied)WARNING:at_drivers/gpu/drm/i915/intel_uncore.c:#assert_device_not_suspended[i915]()@WARNING:.* at .* assert_device_not_suspended+0x
Note: You need to pay more attention to line start with '*'
Jani Nikula June 4, 2015, 8:23 a.m. UTC | #4
On Tue, 02 Jun 2015, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Tue, Jun 02, 2015 at 02:17:47PM +0300, Ander Conselvan de Oliveira wrote:
>> Add all missing platforms handled by intel_set_memory_cxsr() to the
>> i915_sr_status debugfs entry.
>> 
>> v2: Add G4X too. (Ville)
>>     Clarify the change also affects CHV. (Ander)
>> 
>> References: https://bugs.freedesktop.org/show_bug.cgi?id=89792
>> Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
>
> It's a good enough white lie for my taste. 
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Pushed to drm-intel-fixes, thanks for the patch and review.

BR,
Jani.

>
> I would also accept removing the entire file, but we can keep it if
> people find some use for it.
>
>> ---
>>  drivers/gpu/drm/i915/i915_debugfs.c | 5 ++++-
>>  1 file changed, 4 insertions(+), 1 deletion(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
>> index fece922..564a6ba 100644
>> --- a/drivers/gpu/drm/i915/i915_debugfs.c
>> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
>> @@ -1725,12 +1725,15 @@ static int i915_sr_status(struct seq_file *m, void *unused)
>>  
>>  	if (HAS_PCH_SPLIT(dev))
>>  		sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
>> -	else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
>> +	else if (IS_CRESTLINE(dev) || IS_G4X(dev) ||
>> +		 IS_I945G(dev) || IS_I945GM(dev))
>>  		sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
>>  	else if (IS_I915GM(dev))
>>  		sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
>>  	else if (IS_PINEVIEW(dev))
>>  		sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
>> +	else if (IS_VALLEYVIEW(dev))
>> +		sr_enabled = I915_READ(FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
>>  
>>  	intel_runtime_pm_put(dev_priv);
>>  
>> -- 
>> 2.1.0
>
> -- 
> Ville Syrjälä
> Intel OTC
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index fece922..564a6ba 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1725,12 +1725,15 @@  static int i915_sr_status(struct seq_file *m, void *unused)
 
 	if (HAS_PCH_SPLIT(dev))
 		sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
-	else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
+	else if (IS_CRESTLINE(dev) || IS_G4X(dev) ||
+		 IS_I945G(dev) || IS_I945GM(dev))
 		sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
 	else if (IS_I915GM(dev))
 		sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
 	else if (IS_PINEVIEW(dev))
 		sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
+	else if (IS_VALLEYVIEW(dev))
+		sr_enabled = I915_READ(FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
 
 	intel_runtime_pm_put(dev_priv);