From patchwork Fri Jun 5 17:03:53 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caesar Wang X-Patchwork-Id: 6556411 Return-Path: X-Original-To: patchwork-linux-rockchip@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 9156AC0020 for ; Fri, 5 Jun 2015 17:05:16 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 97AE92064F for ; Fri, 5 Jun 2015 17:05:15 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A65D720511 for ; Fri, 5 Jun 2015 17:05:14 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z0v3N-0005iK-3p; Fri, 05 Jun 2015 17:05:09 +0000 Received: from mail-pd0-f179.google.com ([209.85.192.179]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z0v3A-0004UW-S0; Fri, 05 Jun 2015 17:04:58 +0000 Received: by pdbki1 with SMTP id ki1so57081139pdb.1; Fri, 05 Jun 2015 10:04:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=b1Oj13L8G+TJp+AU9lhEcWBZD1IZGB3lq1FAVzgKgxE=; b=i5TvSGvkpapY7YiZhvgiKJdyc/wE2MF2V7HEc1PcPjXD0JlUvyRW4HfCu/fmRo3QeX rRRq9Otboqlryy2ft+ciOLWt1IhSrzbCEwTl20ot6wBqL2BBCLpvp2/zoQ4lhqX3eTYp vSlzRX3ZkJUARJM2uJddlyzIQ5uGOj1UANPI4D2ANfGVGcA83jLPae5vjr3Gh8DcTlkX LJCZ5Cnk1ftibF2lYtqfYCWmGVPmkEFrrBwCIW2vGubRbmSOb22QxzFWJmHhD4iDBLx8 coGyCNsTbEyiOVYux9VHdigCEPj6y69SoBuZu91xzKGH35mJK8TddEiLlAGExeNX8gZb /JGw== X-Received: by 10.70.38.10 with SMTP id c10mr7441433pdk.72.1433523875522; Fri, 05 Jun 2015 10:04:35 -0700 (PDT) Received: from localhost.localdomain ([103.47.144.150]) by mx.google.com with ESMTPSA id he9sm7285279pbc.7.2015.06.05.10.04.29 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 05 Jun 2015 10:04:34 -0700 (PDT) From: Caesar Wang To: Heiko Stuebner Subject: [PATCH v4 1/3] ARM: rockchip: fix the CPU soft reset Date: Sat, 6 Jun 2015 01:03:53 +0800 Message-Id: <1433523836-4299-2-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1433523836-4299-1-git-send-email-wxt@rock-chips.com> References: <1433523836-4299-1-git-send-email-wxt@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150605_100456_972080_1D3EB8FB X-CRM114-Status: GOOD ( 11.07 ) X-Spam-Score: -1.8 (-) Cc: Russell King , Dmitry Torokhov , dianders@chromium.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Caesar Wang X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We need different orderings when turning a core on and turning a core off. In one case we need to assert reset before turning power off. In ther other case we need to turn power on and the deassert reset. In general, the correct flow is: CPU off: reset_control_assert regmap_update_bits(pmu, PMU_PWRDN_CON, BIT(pd), BIT(pd)) ensure power domain is on CPU on: regmap_update_bits(pmu, PMU_PWRDN_CON, BIT(pd), 0) reset_control_deassert ensure power domain is on This is needed for stressing CPU up/down, as per: cd /sys/devices/system/cpu/ for i in $(seq 1000); do echo "================= $i ============" for j in $(seq 100); do while [[ "$(cat cpu1/online)$(cat cpu2/online)$(cat cpu3/online)" != "000"" ]] echo 0 > cpu1/online echo 0 > cpu2/online echo 0 > cpu3/online done while [[ "$(cat cpu1/online)$(cat cpu2/online)$(cat cpu3/online)" != "111" ]]; do echo 1 > cpu1/online echo 1 > cpu2/online echo 1 > cpu3/online done done done The following is reproducile log: [34466.186812] PM: noirq suspend of devices complete after 0.669 msecs [34466.186824] Disabling non-boot CPUs ... [34466.187509] CPU1: shutdown [34466.188672] CPU2: shutdown [34473.736627] Kernel panic - not syncing:Watchdog detected hard LOCKUP on cpu 0 ....... Signed-off-by: Caesar Wang Reviewed-by: Doug Anderson --- arch/arm/mach-rockchip/platsmp.c | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c index 5b4ca3c..a297b86 100644 --- a/arch/arm/mach-rockchip/platsmp.c +++ b/arch/arm/mach-rockchip/platsmp.c @@ -88,18 +88,26 @@ static int pmu_set_power_domain(int pd, bool on) return PTR_ERR(rstc); } + if (!on) + reset_control_assert(rstc); + + ret = regmap_update_bits(pmu, PMU_PWRDN_CON, BIT(pd), val); + if (ret < 0) { + pr_err("%s: could not update power domain\n", __func__); + reset_control_put(rstc); + return ret; + } + if (on) reset_control_deassert(rstc); - else - reset_control_assert(rstc); reset_control_put(rstc); - } - - ret = regmap_update_bits(pmu, PMU_PWRDN_CON, BIT(pd), val); - if (ret < 0) { - pr_err("%s: could not update power domain\n", __func__); - return ret; + } else { + ret = regmap_update_bits(pmu, PMU_PWRDN_CON, BIT(pd), val); + if (ret < 0) { + pr_err("%s: could not update power domain\n", __func__); + return ret; + } } ret = -1;