[v5,2/3] ARM: rockchip: ensure CPU to enter WFI/WFE state
diff mbox

Message ID 1433747496-7642-3-git-send-email-wxt@rock-chips.com
State New
Headers show

Commit Message

Caesar Wang June 8, 2015, 7:11 a.m. UTC
The patch can ensure that v7_exit_coherency_flush() in rockchip_cpu_die()
executed in time.
The mdelay(1) has enough time to fix the problem of CPU offlining.
That's a workaround way in rockchip hotplug code,
At least, we haven't a better way to solve it. Who know,
that maybe fixed by chip (hardware) in the future.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>

Changes in v5:
    - Fix the patch decription.
    - Add the changelog.

Changes in v4: None

Changes in v3: None

Changes in v2: None

Changes in v2:
    - As Kever points out, Fix the subject typo WFI/WFE.

---

 arch/arm/mach-rockchip/platsmp.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Russell King - ARM Linux June 8, 2015, 9:28 a.m. UTC | #1
On Mon, Jun 08, 2015 at 03:11:35PM +0800, Caesar Wang wrote:
> diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c
> index bd40852..5bc2a89 100644
> --- a/arch/arm/mach-rockchip/platsmp.c
> +++ b/arch/arm/mach-rockchip/platsmp.c
> @@ -321,6 +321,9 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus)
>  #ifdef CONFIG_HOTPLUG_CPU
>  static int rockchip_cpu_kill(unsigned int cpu)
>  {
> +	/* ensure CPU can enter the WFI/WFE state */

I would like to see a better comment here, describing what the problem
is.  Maybe something like this:

	/*
	 * We need a delay here to ensure that the dying CPU can finish
	 * executing v7_coherency_exit() and reach the WFI/WFE state
	 * prior to having the power domain disabled.
	 */

Thanks.

> +	mdelay(1);
> +
>  	pmu_set_power_domain(0 + cpu, false);
>  	return 1;
>  }
> -- 
> 1.9.1
>
Caesar Wang June 9, 2015, 12:40 a.m. UTC | #2
? 2015?06?08? 17:28, Russell King - ARM Linux ??:
> On Mon, Jun 08, 2015 at 03:11:35PM +0800, Caesar Wang wrote:
>> diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c
>> index bd40852..5bc2a89 100644
>> --- a/arch/arm/mach-rockchip/platsmp.c
>> +++ b/arch/arm/mach-rockchip/platsmp.c
>> @@ -321,6 +321,9 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus)
>>   #ifdef CONFIG_HOTPLUG_CPU
>>   static int rockchip_cpu_kill(unsigned int cpu)
>>   {
>> +	/* ensure CPU can enter the WFI/WFE state */
> I would like to see a better comment here, describing what the problem
> is.  Maybe something like this:
>
> 	/*
> 	 * We need a delay here to ensure that the dying CPU can finish
> 	 * executing v7_coherency_exit() and reach the WFI/WFE state
> 	 * prior to having the power domain disabled.
> 	 */
>
> Thanks.

OK,
Thanks!
>> +	mdelay(1);
>> +
>>   	pmu_set_power_domain(0 + cpu, false);
>>   	return 1;
>>   }
>> -- 
>> 1.9.1
>>

Patch
diff mbox

diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c
index bd40852..5bc2a89 100644
--- a/arch/arm/mach-rockchip/platsmp.c
+++ b/arch/arm/mach-rockchip/platsmp.c
@@ -321,6 +321,9 @@  static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus)
 #ifdef CONFIG_HOTPLUG_CPU
 static int rockchip_cpu_kill(unsigned int cpu)
 {
+	/* ensure CPU can enter the WFI/WFE state */
+	mdelay(1);
+
 	pmu_set_power_domain(0 + cpu, false);
 	return 1;
 }