From patchwork Tue Jan 2 06:58:58 2001 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 6620761 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id DD67D9F358 for ; Tue, 16 Jun 2015 22:17:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9628A20814 for ; Tue, 16 Jun 2015 22:17:50 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 82DA52080F for ; Tue, 16 Jun 2015 22:17:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F3B636E5B7; Tue, 16 Jun 2015 15:17:48 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-qc0-f181.google.com (mail-qc0-f181.google.com [209.85.216.181]) by gabe.freedesktop.org (Postfix) with ESMTP id 963EE6E5B6 for ; Tue, 16 Jun 2015 15:17:46 -0700 (PDT) Received: by qcwx2 with SMTP id x2so9002895qcw.1 for ; Tue, 16 Jun 2015 15:17:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=AR+VmJI+5JcQ2nypiNKFzmm/GNKr97H+O/kW7WrX52I=; b=R/mGT2hXDqAtzIoUytoeCMJoY7yW72xrcoddnL73RnM7KgqMt0cfWs31Xsx3A8gPLF xRIztbEdQsTa6heyJDJJkPqCqonTMbvRm4vwS+z9ONgAjadBpmR1FoPQdd/sJ9IpD60g 0eW1NTpWlJfeUNl5iiQwH3aE4WcCfTyAMR9Rsqj1ulRXrlzPRd8AMCobKJEPw48VnMuM eV1S5vzqWY5QqQ3ShFigdDprE/GzhI+HOaxEYCXxu6C/33W1khjMf/tqXYqUBM9Xyrzr zCcuwPQ9mKMFkQjq9uLZ4TbcITTxdGyxUHM9ZZvGAzxfqzVomKJPqEl/cg8ztTKokDXA kc7Q== X-Received: by 10.140.238.87 with SMTP id j84mr3904666qhc.29.1434493066219; Tue, 16 Jun 2015 15:17:46 -0700 (PDT) Received: from localhost.localdomain (r130-pw-tresbarras.ibys.com.br. [189.76.1.243]) by mx.google.com with ESMTPSA id 60sm1170554qgy.11.2015.06.16.15.17.44 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 16 Jun 2015 15:17:45 -0700 (PDT) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Tue, 2 Jan 2001 04:58:58 -0200 Message-Id: <978418739-1927-3-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <978418739-1927-1-git-send-email-przanoni@gmail.com> References: <978418739-1927-1-git-send-email-przanoni@gmail.com> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 2/3] drm/i915: add the FBC mutex X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-1.3 required=5.0 tests=BAYES_00, DATE_IN_PAST_96_XX, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,FREEMAIL_FROM,RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Paulo Zanoni Make sure we're not gonna have weird races in really weird cases where a lot of different CRTCs are doing rendering and modesets at the same time. v2: - Rebase (6 months later) - Also lock debugfs and stolen. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_debugfs.c | 8 ++++ drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem_stolen.c | 7 ++++ drivers/gpu/drm/i915/intel_fbc.c | 73 +++++++++++++++++++++++++++------- 4 files changed, 75 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index c49fe2a..c99be0e 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -1593,6 +1593,7 @@ static int i915_fbc_status(struct seq_file *m, void *unused) } intel_runtime_pm_get(dev_priv); + mutex_lock(&dev_priv->fbc.lock); if (intel_fbc_enabled(dev)) seq_puts(m, "FBC enabled\n"); @@ -1605,6 +1606,7 @@ static int i915_fbc_status(struct seq_file *m, void *unused) yesno(I915_READ(FBC_STATUS2) & FBC_COMPRESSION_MASK)); + mutex_unlock(&dev_priv->fbc.lock); intel_runtime_pm_put(dev_priv); return 0; @@ -1619,7 +1621,11 @@ static int i915_fbc_fc_get(void *data, u64 *val) return -ENODEV; drm_modeset_lock_all(dev); + mutex_lock(&dev_priv->fbc.lock); + *val = dev_priv->fbc.false_color; + + mutex_unlock(&dev_priv->fbc.lock); drm_modeset_unlock_all(dev); return 0; @@ -1635,6 +1641,7 @@ static int i915_fbc_fc_set(void *data, u64 val) return -ENODEV; drm_modeset_lock_all(dev); + mutex_lock(&dev_priv->fbc.lock); reg = I915_READ(ILK_DPFC_CONTROL); dev_priv->fbc.false_color = val; @@ -1643,6 +1650,7 @@ static int i915_fbc_fc_set(void *data, u64 val) (reg | FBC_CTL_FALSE_COLOR) : (reg & ~FBC_CTL_FALSE_COLOR)); + mutex_unlock(&dev_priv->fbc.lock); drm_modeset_unlock_all(dev); return 0; } diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 491ef0c..9ab04f7 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -891,6 +891,7 @@ enum fb_op_origin { }; struct i915_fbc { + struct mutex lock; unsigned long uncompressed_size; unsigned threshold; unsigned int fb_id; diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c index 348ed5a..947ddb4 100644 --- a/drivers/gpu/drm/i915/i915_gem_stolen.c +++ b/drivers/gpu/drm/i915/i915_gem_stolen.c @@ -250,6 +250,8 @@ int i915_gem_stolen_setup_compression(struct drm_device *dev, int size, int fb_c { struct drm_i915_private *dev_priv = dev->dev_private; + lockdep_assert_held(&dev_priv->fbc.lock); + if (!drm_mm_initialized(&dev_priv->mm.stolen)) return -ENODEV; @@ -266,6 +268,8 @@ void i915_gem_stolen_cleanup_compression(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; + lockdep_assert_held(&dev_priv->fbc.lock); + if (dev_priv->fbc.uncompressed_size == 0) return; @@ -286,7 +290,10 @@ void i915_gem_cleanup_stolen(struct drm_device *dev) if (!drm_mm_initialized(&dev_priv->mm.stolen)) return; + mutex_lock(&dev_priv->fbc.lock); i915_gem_stolen_cleanup_compression(dev); + mutex_unlock(&dev_priv->fbc.lock); + drm_mm_takedown(&dev_priv->mm.stolen); } diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c index 9e55b9b..31ff88b 100644 --- a/drivers/gpu/drm/i915/intel_fbc.c +++ b/drivers/gpu/drm/i915/intel_fbc.c @@ -336,6 +336,7 @@ static void intel_fbc_work_fn(struct work_struct *__work) struct drm_i915_private *dev_priv = dev->dev_private; mutex_lock(&dev->struct_mutex); + mutex_lock(&dev_priv->fbc.lock); if (work == dev_priv->fbc.fbc_work) { /* Double check that we haven't switched fb without cancelling * the prior work. @@ -350,6 +351,7 @@ static void intel_fbc_work_fn(struct work_struct *__work) dev_priv->fbc.fbc_work = NULL; } + mutex_unlock(&dev_priv->fbc.lock); mutex_unlock(&dev->struct_mutex); kfree(work); @@ -357,6 +359,8 @@ static void intel_fbc_work_fn(struct work_struct *__work) static void intel_fbc_cancel_work(struct drm_i915_private *dev_priv) { + lockdep_assert_held(&dev_priv->fbc.lock); + if (dev_priv->fbc.fbc_work == NULL) return; @@ -384,6 +388,8 @@ static void intel_fbc_enable(struct drm_crtc *crtc) struct drm_device *dev = crtc->dev; struct drm_i915_private *dev_priv = dev->dev_private; + lockdep_assert_held(&dev_priv->fbc.lock); + if (!dev_priv->display.enable_fbc) return; @@ -418,16 +424,12 @@ static void intel_fbc_enable(struct drm_crtc *crtc) schedule_delayed_work(&work->work, msecs_to_jiffies(50)); } -/** - * intel_fbc_disable - disable FBC - * @dev: the drm_device - * - * This function disables FBC. - */ -void intel_fbc_disable(struct drm_device *dev) +static void __intel_fbc_disable(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; + lockdep_assert_held(&dev_priv->fbc.lock); + intel_fbc_cancel_work(dev_priv); if (!dev_priv->display.disable_fbc) @@ -437,6 +439,21 @@ void intel_fbc_disable(struct drm_device *dev) dev_priv->fbc.crtc = NULL; } +/** + * intel_fbc_disable - disable FBC + * @dev: the drm_device + * + * This function disables FBC. + */ +void intel_fbc_disable(struct drm_device *dev) +{ + struct drm_i915_private *dev_priv = dev->dev_private; + + mutex_lock(&dev_priv->fbc.lock); + __intel_fbc_disable(dev); + mutex_unlock(&dev_priv->fbc.lock); +} + const char *intel_no_fbc_reason_str(enum no_fbc_reason reason) { switch (reason) { @@ -516,7 +533,7 @@ static struct drm_crtc *intel_fbc_find_crtc(struct drm_i915_private *dev_priv) } /** - * intel_fbc_update - enable/disable FBC as needed + * __intel_fbc_update - enable/disable FBC as needed, unlocked * @dev: the drm_device * * Set up the framebuffer compression hardware at mode set time. We @@ -534,7 +551,7 @@ static struct drm_crtc *intel_fbc_find_crtc(struct drm_i915_private *dev_priv) * * We need to enable/disable FBC on a global basis. */ -void intel_fbc_update(struct drm_device *dev) +static void __intel_fbc_update(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; struct drm_crtc *crtc = NULL; @@ -544,6 +561,8 @@ void intel_fbc_update(struct drm_device *dev) const struct drm_display_mode *adjusted_mode; unsigned int max_width, max_height; + lockdep_assert_held(&dev_priv->fbc.lock); + if (!HAS_FBC(dev)) return; @@ -665,7 +684,7 @@ void intel_fbc_update(struct drm_device *dev) * some point. And we wait before enabling FBC anyway. */ DRM_DEBUG_KMS("disabling active FBC for update\n"); - intel_fbc_disable(dev); + __intel_fbc_disable(dev); } intel_fbc_enable(crtc); @@ -676,11 +695,26 @@ out_disable: /* Multiple disables should be harmless */ if (intel_fbc_enabled(dev)) { DRM_DEBUG_KMS("unsupported config, disabling FBC\n"); - intel_fbc_disable(dev); + __intel_fbc_disable(dev); } i915_gem_stolen_cleanup_compression(dev); } +/* + * intel_fbc_update - enable/disable FBC as needed + * @dev: the drm_device + * + * This function reevaluates the overall state and enables or disables FBC. + */ +void intel_fbc_update(struct drm_device *dev) +{ + struct drm_i915_private *dev_priv = dev->dev_private; + + mutex_lock(&dev_priv->fbc.lock); + __intel_fbc_update(dev); + mutex_unlock(&dev_priv->fbc.lock); +} + void intel_fbc_invalidate(struct drm_i915_private *dev_priv, unsigned int frontbuffer_bits, enum fb_op_origin origin) @@ -691,6 +725,8 @@ void intel_fbc_invalidate(struct drm_i915_private *dev_priv, if (origin == ORIGIN_GTT) return; + mutex_lock(&dev_priv->fbc.lock); + if (dev_priv->fbc.enabled) fbc_bits = INTEL_FRONTBUFFER_PRIMARY(dev_priv->fbc.crtc->pipe); else if (dev_priv->fbc.fbc_work) @@ -702,7 +738,9 @@ void intel_fbc_invalidate(struct drm_i915_private *dev_priv, dev_priv->fbc.busy_bits |= (fbc_bits & frontbuffer_bits); if (dev_priv->fbc.busy_bits) - intel_fbc_disable(dev); + __intel_fbc_disable(dev); + + mutex_unlock(&dev_priv->fbc.lock); } void intel_fbc_flush(struct drm_i915_private *dev_priv, @@ -710,13 +748,18 @@ void intel_fbc_flush(struct drm_i915_private *dev_priv, { struct drm_device *dev = dev_priv->dev; + mutex_lock(&dev_priv->fbc.lock); + if (!dev_priv->fbc.busy_bits) - return; + goto out; dev_priv->fbc.busy_bits &= ~frontbuffer_bits; if (!dev_priv->fbc.busy_bits) - intel_fbc_update(dev); + __intel_fbc_update(dev); + +out: + mutex_unlock(&dev_priv->fbc.lock); } /** @@ -729,6 +772,8 @@ void intel_fbc_init(struct drm_i915_private *dev_priv) { enum pipe pipe; + mutex_init(&dev_priv->fbc.lock); + if (!HAS_FBC(dev_priv)) { dev_priv->fbc.enabled = false; dev_priv->fbc.no_fbc_reason = FBC_UNSUPPORTED;