igt: Add gem_eio for inducing expected EIO
diff mbox

Message ID 1434562649-359-1-git-send-email-chris@chris-wilson.co.uk
State New
Headers show

Commit Message

Chris Wilson June 17, 2015, 5:37 p.m. UTC
A few entry points in the GEM API are expected to raise EIO if we
encounter a wedged GPU. This testcase aims to do so by first injecting a
GPU hang with GPU resets disabled (thus causing the GPU to become wedged)
and then exercises the various API to check for the expected errors.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/Makefile.sources |   1 +
 tests/gem_eio.c        | 168 +++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 169 insertions(+)
 create mode 100644 tests/gem_eio.c

Patch
diff mbox

diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 551c600..15d8382 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -20,6 +20,7 @@  TESTS_progs_M = \
 	gem_ctx_bad_exec \
 	gem_ctx_exec \
 	gem_dummy_reloc_loop \
+	gem_eio \
 	gem_evict_alignment \
 	gem_evict_everything \
 	gem_exec_bad_domains \
diff --git a/tests/gem_eio.c b/tests/gem_eio.c
new file mode 100644
index 0000000..8c85e3a
--- /dev/null
+++ b/tests/gem_eio.c
@@ -0,0 +1,168 @@ 
+/*
+ * Copyright © 2015 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+/*
+ * Testcase: Test that ioctl report a wedged GPU.
+ *
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <unistd.h>
+#include <fcntl.h>
+#include <inttypes.h>
+#include <errno.h>
+#include <sys/ioctl.h>
+
+#include <drm.h>
+
+#include "drmtest.h"
+#include "ioctl_wrappers.h"
+#include "igt_core.h"
+#include "igt_aux.h"
+#include "igt_gt.h"
+
+IGT_TEST_DESCRIPTION("Test that ioctls report a wedged GPU (EIO).");
+
+static bool gpu_reset_control(bool enable)
+{
+	const char *path = "/sys/module/i915/parameters/reset";
+	int fd, ret;
+
+	igt_debug("%s GPU reset\n", enable ? "Enabling" : "Disabling");
+
+	fd = open(path, O_RDWR);
+	igt_require(fd >= 0);
+
+	ret = write(fd, &"NY"[enable], 1);
+	close(fd);
+
+	return ret == 1;
+}
+
+static bool gpu_wedged_control(void)
+{
+	int fd, ret;
+
+	igt_debug("Triggering GPU reset\n");
+
+	fd = igt_debugfs_open("i915_wedged", O_RDWR);
+	igt_require(fd >= 0);
+
+	ret = write(fd, "1\n", 2) == 2;
+	close(fd);
+
+	return ret;
+}
+
+static void trigger_reset(int fd)
+{
+	igt_assert(gpu_wedged_control());
+
+	/* And just check the gpu is indeed running again */
+	gem_quiescent_gpu(fd);
+}
+
+static int throttle(int fd)
+{
+	int err = 0;
+	if (drmIoctl(fd, DRM_IOCTL_I915_GEM_THROTTLE, NULL))
+		err = -errno;
+	return err;
+}
+
+static void wedge_gpu(int fd)
+{
+	igt_hang_ring_t hang;
+
+	igt_debug("Wedging GPU by injecting hang\n");
+	igt_require(gpu_reset_control(false));
+	hang = igt_hang_ring(fd, I915_EXEC_DEFAULT);
+
+	igt_debug("Waiting for GPU hang\n");
+	igt_post_hang_ring(fd, hang);
+	igt_assert(gpu_reset_control(true));
+}
+
+static void test_throttle(int fd)
+{
+	wedge_gpu(fd);
+
+	igt_assert_eq(throttle(fd), -EIO);
+
+	trigger_reset(fd);
+}
+
+static int __gem_execbuf(int fd, struct drm_i915_gem_execbuffer2 *eb)
+{
+	int err = 0;
+	if (drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, eb))
+		err = -errno;
+	return err;
+}
+
+static void test_execbuf(int fd)
+{
+	struct drm_i915_gem_execbuffer2 execbuf;
+	struct drm_i915_gem_exec_object2 exec;
+	uint32_t tmp[] = { MI_BATCH_BUFFER_END };
+
+	memset(&exec, 0, sizeof(exec));
+	memset(&execbuf, 0, sizeof(execbuf));
+
+	exec.handle = gem_create(fd, 4096);
+	gem_write(fd, exec.handle, 0, tmp, sizeof(tmp));
+
+	execbuf.buffers_ptr = (uintptr_t)&exec;
+	execbuf.buffer_count = 1;
+
+	wedge_gpu(fd);
+
+	igt_assert_eq(__gem_execbuf(fd, &execbuf), -EIO);
+	gem_close(fd, exec.handle);
+
+	trigger_reset(fd);
+}
+
+igt_main
+{
+	int fd;
+
+	igt_skip_on_simulation();
+
+	igt_fixture {
+		fd = drm_open_any();
+		igt_require_hang_ring(fd, -1);
+	}
+
+	igt_subtest("throttle")
+		test_throttle(fd);
+
+	igt_subtest("execbuf")
+		test_execbuf(fd);
+
+	igt_fixture
+		close(fd);
+}