[1/5] drm/i915: Enable runtime pm
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Message ID 1434653006-5693-1-git-send-email-rodrigo.vivi@intel.com
State New
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Commit Message

Rodrigo Vivi June 18, 2015, 6:43 p.m. UTC
From: Daniel Vetter <daniel.vetter@ffwll.ch>

Like with every other feature that's not enabled by default we break
runtime pm support way too often by accident because the overall test
coverage isn't great. And it's been almost 2 years since we enabled
the power well code by default

commit bf51d5e2cda5d36d98e4b46ac7fca9461e512c41
Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
Date:   Wed Jul 3 17:12:13 2013 -0300

    drm/i915: switch disable_power_well default value to 1

It's really more than overdue for runtime pm itself to follow!

Note that in practice this wont do a hole lot yet, since we're still
gated on snd-hda-intel doing proper runtime pm. But I've discussed
this with Liam and we agreed that this needs to be done. And the audio
team is working to hold up their end of this bargain.

And the justification for updating the autosuspend delay to 100ms:
Quick measurment shows that we can do a full rpm cycle in about 5ms,
which means the delay should still be really conservative from a power
conservation pov. The only workload that would suffer from ping-pong
is also only gpu/compute with all screens off. 100ms should cover any
kind of latency with submitting follow-up batches.

Cc: Takashi Iwai <tiwai@suse.de>
Cc: Liam Girdwood <liam.r.girdwood@intel.com>
Cc: Yang, Libin <libin.yang@intel.com>
Cc: Lin, Mengdong <mengdong.lin@intel.com>
Cc: Li, Jocelyn <jocelyn.li@intel.com>
Cc: Kaskinen, Tanu <tanu.kaskinen@intel.com>
Cc: Zanoni, Paulo R <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/intel_runtime_pm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Rodrigo Vivi June 18, 2015, 6:53 p.m. UTC | #1
I understand this patch is yet under discussion. I just re-sent to
warn that the following one depends on this. Otherwise it is better to
remove it and proceed with the last 3 patches of the series.

Thanks

On Thu, Jun 18, 2015 at 11:43 AM, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> From: Daniel Vetter <daniel.vetter@ffwll.ch>
>
> Like with every other feature that's not enabled by default we break
> runtime pm support way too often by accident because the overall test
> coverage isn't great. And it's been almost 2 years since we enabled
> the power well code by default
>
> commit bf51d5e2cda5d36d98e4b46ac7fca9461e512c41
> Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Date:   Wed Jul 3 17:12:13 2013 -0300
>
>     drm/i915: switch disable_power_well default value to 1
>
> It's really more than overdue for runtime pm itself to follow!
>
> Note that in practice this wont do a hole lot yet, since we're still
> gated on snd-hda-intel doing proper runtime pm. But I've discussed
> this with Liam and we agreed that this needs to be done. And the audio
> team is working to hold up their end of this bargain.
>
> And the justification for updating the autosuspend delay to 100ms:
> Quick measurment shows that we can do a full rpm cycle in about 5ms,
> which means the delay should still be really conservative from a power
> conservation pov. The only workload that would suffer from ping-pong
> is also only gpu/compute with all screens off. 100ms should cover any
> kind of latency with submitting follow-up batches.
>
> Cc: Takashi Iwai <tiwai@suse.de>
> Cc: Liam Girdwood <liam.r.girdwood@intel.com>
> Cc: Yang, Libin <libin.yang@intel.com>
> Cc: Lin, Mengdong <mengdong.lin@intel.com>
> Cc: Li, Jocelyn <jocelyn.li@intel.com>
> Cc: Kaskinen, Tanu <tanu.kaskinen@intel.com>
> Cc: Zanoni, Paulo R <paulo.r.zanoni@intel.com>
> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
> Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 1a45385..2628b21 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -1831,9 +1831,10 @@ void intel_runtime_pm_enable(struct drm_i915_private *dev_priv)
>                 return;
>         }
>
> -       pm_runtime_set_autosuspend_delay(device, 10000); /* 10s */
> +       pm_runtime_set_autosuspend_delay(device, 100);
>         pm_runtime_mark_last_busy(device);
>         pm_runtime_use_autosuspend(device);
> +       pm_runtime_allow(device);
>
>         pm_runtime_put_autosuspend(device);
>  }
> --
> 2.1.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Patch
diff mbox

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 1a45385..2628b21 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -1831,9 +1831,10 @@  void intel_runtime_pm_enable(struct drm_i915_private *dev_priv)
 		return;
 	}
 
-	pm_runtime_set_autosuspend_delay(device, 10000); /* 10s */
+	pm_runtime_set_autosuspend_delay(device, 100);
 	pm_runtime_mark_last_busy(device);
 	pm_runtime_use_autosuspend(device);
+	pm_runtime_allow(device);
 
 	pm_runtime_put_autosuspend(device);
 }