| Message ID | 1434664409-20380-1-git-send-email-gaurav.k.singh@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, Jun 19, 2015 at 03:23:29AM +0530, Gaurav K Singh wrote: > During disable sequence for MIPI encoder in command mode, disable > MIPI display self-refresh mode bit in Pipe Ctrl reg. > > v2: Use crtc state flag instead of loop over encoders (Daniel) > > Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com> > Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohan.marimuthu@intel.com> > Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com> > --- > drivers/gpu/drm/i915/intel_display.c | 3 +++ > drivers/gpu/drm/i915/intel_drv.h | 3 +++ > drivers/gpu/drm/i915/intel_dsi.c | 3 +++ > 3 files changed, 9 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 067b1de..dd518d6 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -2193,6 +2193,9 @@ static void intel_disable_pipe(struct intel_crtc *crtc) > if ((val & PIPECONF_ENABLE) == 0) > return; > > + if (crtc->config->dsi_self_refresh) > + val = val & ~PIPECONF_MIPI_DSR_ENABLE; This shouldn't be required since we just clear all of PIPECONF when disabling (well when re-enabling too) the crtc. What's missing though is the hw state readout & cross-check support for this new state bit. Also the code to set this bit seems to be missing. -Daniel > + > /* > * Double wide has implications for planes > * so best keep it disabled when not needed. > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h > index 14562c6..4298a00 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -444,6 +444,9 @@ struct intel_crtc_state { > bool double_wide; > > bool dp_encoder_is_mst; > + > + bool dsi_self_refresh; > + > int pbn; > > struct intel_crtc_scaler_state scaler_state; > diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c > index 7021591..36d8ad6 100644 > --- a/drivers/gpu/drm/i915/intel_dsi.c > +++ b/drivers/gpu/drm/i915/intel_dsi.c > @@ -308,6 +308,9 @@ static bool intel_dsi_compute_config(struct intel_encoder *encoder, > > DRM_DEBUG_KMS("\n"); > > + if (is_cmd_mode(intel_dsi)) > + config->dsi_self_refresh = true; > + > if (fixed_mode) > intel_fixed_panel_mode(fixed_mode, adjusted_mode); > > -- > 1.7.9.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 067b1de..dd518d6 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2193,6 +2193,9 @@ static void intel_disable_pipe(struct intel_crtc *crtc) if ((val & PIPECONF_ENABLE) == 0) return; + if (crtc->config->dsi_self_refresh) + val = val & ~PIPECONF_MIPI_DSR_ENABLE; + /* * Double wide has implications for planes * so best keep it disabled when not needed. diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 14562c6..4298a00 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -444,6 +444,9 @@ struct intel_crtc_state { bool double_wide; bool dp_encoder_is_mst; + + bool dsi_self_refresh; + int pbn; struct intel_crtc_scaler_state scaler_state; diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c index 7021591..36d8ad6 100644 --- a/drivers/gpu/drm/i915/intel_dsi.c +++ b/drivers/gpu/drm/i915/intel_dsi.c @@ -308,6 +308,9 @@ static bool intel_dsi_compute_config(struct intel_encoder *encoder, DRM_DEBUG_KMS("\n"); + if (is_cmd_mode(intel_dsi)) + config->dsi_self_refresh = true; + if (fixed_mode) intel_fixed_panel_mode(fixed_mode, adjusted_mode);