From patchwork Thu Jun 18 21:56:45 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gaurav K Singh X-Patchwork-Id: 6641191 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 62EDBC0020 for ; Thu, 18 Jun 2015 21:59:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C54D620891 for ; Thu, 18 Jun 2015 21:59:40 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 2FB5620888 for ; Thu, 18 Jun 2015 21:59:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B15886E067; Thu, 18 Jun 2015 14:59:38 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id 32D956E067 for ; Thu, 18 Jun 2015 14:59:38 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga103.jf.intel.com with ESMTP; 18 Jun 2015 14:59:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,641,1427785200"; d="scan'208";a="749276239" Received: from gksingh1.iind.intel.com ([10.223.26.84]) by orsmga002.jf.intel.com with ESMTP; 18 Jun 2015 14:59:36 -0700 From: Gaurav K Singh To: intel-gfx Date: Fri, 19 Jun 2015 03:26:45 +0530 Message-Id: <1434664605-20419-1-git-send-email-gaurav.k.singh@intel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <558056E7.3050105@intel.com> References: <558056E7.3050105@intel.com> Cc: Shobhit Kumar Subject: [Intel-gfx] [RFC 11/14] drm/i915: Enable MIPI display self refresh mode X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP During enable sequence for MIPI encoder in command mode, enable MIPI display self-refresh mode bit in Pipe Ctrl reg. v2: Use crtc state flag instead of loop over encoders (Daniel) Signed-off-by: Gaurav K Singh Signed-off-by: Yogesh Mohan Marimuthu Signed-off-by: Shobhit Kumar --- drivers/gpu/drm/i915/intel_display.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index dd518d6..c53f66d 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2158,6 +2158,11 @@ static void intel_enable_pipe(struct intel_crtc *crtc) return; } + if (crtc->config->dsi_self_refresh) { + val = val | PIPECONF_MIPI_DSR_ENABLE; + I915_WRITE(reg, val); + } + I915_WRITE(reg, val | PIPECONF_ENABLE); POSTING_READ(reg); }