From patchwork Wed Jun 24 19:00:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 6669931 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id DA5319F1C1 for ; Wed, 24 Jun 2015 19:00:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0861D205F4 for ; Wed, 24 Jun 2015 19:00:32 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id DD80A205DF for ; Wed, 24 Jun 2015 19:00:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 50A0D6EB32; Wed, 24 Jun 2015 12:00:30 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 51B716EB32 for ; Wed, 24 Jun 2015 12:00:29 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga102.jf.intel.com with ESMTP; 24 Jun 2015 12:00:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,673,1427785200"; d="scan'208";a="749764318" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.88]) by fmsmga002.fm.intel.com with SMTP; 24 Jun 2015 12:00:27 -0700 Received: by stinkbox (sSMTP sendmail emulation); Wed, 24 Jun 2015 22:00:17 +0300 From: ville.syrjala@linux.intel.com To: intel-gfx@lists.freedesktop.org Date: Wed, 24 Jun 2015 22:00:02 +0300 Message-Id: <1435172410-9834-3-git-send-email-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.3.6 In-Reply-To: <1435172410-9834-1-git-send-email-ville.syrjala@linux.intel.com> References: <1435172410-9834-1-git-send-email-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 02/10] drm/i915: Split atomic wm update to pre and post variants X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ville Syrjälä Try to update the watermarks on the right side of the plane update. This is just a temporary hack until we get the proper two part update into place. However in the meantime this might have some chance of at least working. Signed-off-by: Ville Syrjälä Reviewed-by: Clint Taylor Tested-by: Clint Taylor --- drivers/gpu/drm/i915/intel_display.c | 15 +++++++++++---- drivers/gpu/drm/i915/intel_drv.h | 2 +- 2 files changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 29c584c..1a1c686 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4713,6 +4713,9 @@ static void intel_post_plane_update(struct intel_crtc *crtc) intel_frontbuffer_flip(dev, atomic->fb_bits); + if (crtc->atomic.update_wm_post) + intel_update_watermarks(&crtc->base); + if (atomic->update_fbc) { mutex_lock(&dev->struct_mutex); intel_fbc_update(dev); @@ -11641,8 +11644,12 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state, plane->base.id, was_visible, visible, turn_off, turn_on, mode_changed); - if (intel_wm_need_update(plane, plane_state)) - intel_crtc->atomic.update_wm = true; + if (turn_on) + intel_crtc->atomic.update_wm_pre = true; + else if (turn_off) + intel_crtc->atomic.update_wm_post = true; + else if (intel_wm_need_update(plane, plane_state)) + intel_crtc->atomic.update_wm_pre = true; if (visible) intel_crtc->atomic.fb_bits |= @@ -11800,7 +11807,7 @@ static int intel_crtc_atomic_check(struct drm_crtc *crtc, intel_crtc_check_initial_planes(crtc, crtc_state); if (mode_changed) - intel_crtc->atomic.update_wm = !crtc_state->active; + intel_crtc->atomic.update_wm_post = !crtc_state->active; if (mode_changed && crtc_state->enable && dev_priv->display.crtc_compute_clock && @@ -13729,7 +13736,7 @@ static void intel_begin_crtc_commit(struct drm_crtc *crtc) if (!needs_modeset(crtc->state)) intel_pre_plane_update(intel_crtc); - if (intel_crtc->atomic.update_wm) + if (intel_crtc->atomic.update_wm_pre) intel_update_watermarks(crtc); intel_runtime_pm_get(dev_priv); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index de2cc26..fefaf01 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -499,7 +499,7 @@ struct intel_crtc_atomic_commit { bool wait_for_flips; bool disable_fbc; bool pre_disable_primary; - bool update_wm; + bool update_wm_pre, update_wm_post; unsigned disabled_planes; /* Sleepable operations to perform after commit */