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[2/2] drm/i915/skl: Don't try to disable DC6 if the DMC firwmare isn't loaded

Message ID 1435596299-10058-2-git-send-email-damien.lespiau@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Lespiau, Damien June 29, 2015, 4:44 p.m. UTC
Currently, when the firwmare isn't loaded, we don't enable DC6
(obviously!) but the disable path tries unconditionally to disable DC6.

 [drm:i915_power_well_enable] enabling power well 1
 [drm:i915_power_well_enable] enabling MISC IO power well
 [drm:i915_power_well_enable] enabling power well 2
 ------------[ cut here ]------------
 WARNING: CPU: 2 PID: 1935 at drivers/gpu/drm/i915/intel_csr.c:466 assert_csr_loaded+0xa9/0x100 [i915]()
 CSR is not loaded.
 Hardware name: Intel Corporation Skylake Client platform/Skylake Y LPDDR3 RVP3, BIOS SKLSE2P1.86C.X060.R00.1411120819 11/12/2014
  ffffffffa01b3540 ffff88003f6ffa58 ffffffff8178875c 0000000000000000
  ffff88003f6ffaa8 ffff88003f6ffa98 ffffffff8109425a ffff88003f965af0
  ffff8801469e0000 ffff8801469e0340 0000000000000002 0000000030000003
 Call Trace:
  [<ffffffff8178875c>] dump_stack+0x45/0x57
  [<ffffffff8109425a>] warn_slowpath_common+0x8a/0xc0
  [<ffffffff810942d6>] warn_slowpath_fmt+0x46/0x50
  [<ffffffffa00f73c9>] assert_csr_loaded+0xa9/0x100 [i915]
  [<ffffffffa00f5edb>] skl_set_power_well+0x75b/0xae0 [i915]
  [<ffffffffa00f6293>] skl_power_well_enable+0x13/0x20 [i915]
  [<ffffffffa00f43d8>] i915_power_well_enable+0x28/0x50 [i915]
  [<ffffffffa00f65d3>] intel_display_power_get+0xa3/0xd0 [i915]
  [<ffffffffa017e131>] intel_dp_detect+0xa1/0x4e0 [i915]
  [<ffffffffa00c8cb0>] drm_helper_probe_single_connector_modes_merge_bits+0x300/0x4c0 [drm_kms_helper]
  [<ffffffffa006dd1e>] ? drm_mode_getconnector+0x8e/0x400 [drm]
  [<ffffffffa00c8e83>] drm_helper_probe_single_connector_modes+0x13/0x20 [drm_kms_helper]
  [<ffffffffa006dff9>] drm_mode_getconnector+0x369/0x400 [drm]
  [<ffffffff811d6fe2>] ? might_fault+0x42/0xa0
  [<ffffffffa005edd9>] drm_ioctl+0x359/0x690 [drm]
  [<ffffffffa006dc90>] ? drm_mode_getcrtc+0x150/0x150 [drm]
  [<ffffffff81239a08>] do_vfs_ioctl+0x318/0x570
  [<ffffffff81245201>] ? expand_files+0x221/0x260
  [<ffffffff8133794b>] ? selinux_file_ioctl+0x5b/0x110
  [<ffffffff81239ce1>] SyS_ioctl+0x81/0xa0
  [<ffffffff817917ee>] system_call_fastpath+0x12/0x76

Cc: A.Sunil Kamath <sunil.kamath@intel.com>
Cc: Suketu Shah <suketu.j.shah@intel.com>
Cc Animesh Manna <animesh.manna@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90461
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/intel_runtime_pm.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Shuang He June 30, 2015, 9:38 a.m. UTC | #1
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6669
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
ILK                                  302/302              302/302
SNB                                  312/316              312/316
IVB                                  343/343              343/343
BYT                 -1              287/287              286/287
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*BYT  igt@gem_partial_pwrite_pread@reads-uncached      PASS(1)      FAIL(1)
Note: You need to pay more attention to line start with '*'
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Patch

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index ae80ffa..0d5a166 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -503,6 +503,9 @@  static void skl_disable_dc6(struct drm_i915_private *dev_priv)
 {
 	uint32_t val;
 
+	if (intel_csr_load_status_get(dev_priv) != FW_LOADED)
+		return;
+
 	assert_can_disable_dc6(dev_priv);
 
 	DRM_DEBUG_KMS("Disabling DC6\n");