| Message ID | 1435677400-7630-2-git-send-email-mika.kuoppala@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 6/30/2015 4:16 PM, Mika Kuoppala wrote: > When dma page is setup, warn if we try to point the entries > to a uninitialized (zero) dma address. Like we do with gen6 Reviewed-by: Michel Thierry <michel.thierry@intel.com> [Mental note to add the same in the future pdp initialize function]. > > Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> > --- > drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c > index 23f5896..78bfb88 100644 > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c > @@ -427,6 +427,8 @@ static void gen8_initialize_pt(struct i915_address_space *vm, > { > gen8_pte_t scratch_pte; > > + WARN_ON(px_dma(vm->scratch_page) == 0); > + > scratch_pte = gen8_pte_encode(px_dma(vm->scratch_page), > I915_CACHE_LLC, true); > > @@ -488,6 +490,8 @@ static void gen8_initialize_pd(struct i915_address_space *vm, > { > gen8_pde_t scratch_pde; > > + WARN_ON(px_dma(vm->scratch_pt) == 0); > + > scratch_pde = gen8_pde_encode(px_dma(vm->scratch_pt), I915_CACHE_LLC); > > fill_px(vm->dev, pd, scratch_pde); >
On Tue, Jun 30, 2015 at 05:59:27PM +0100, Michel Thierry wrote: > On 6/30/2015 4:16 PM, Mika Kuoppala wrote: > >When dma page is setup, warn if we try to point the entries > >to a uninitialized (zero) dma address. Like we do with gen6 Just a note that 0 looks only to be reserved due to a quirk of the intel-iommu implementation. There is nothing preventing a different iommu or future implementation using 0 as a valid dma_addr_t afaict. This should presumably be WARN_ON(dma_mapping_error(&dev->pdev->dev, px_dma())); -Chris
Chris Wilson <chris@chris-wilson.co.uk> writes: > On Tue, Jun 30, 2015 at 05:59:27PM +0100, Michel Thierry wrote: >> On 6/30/2015 4:16 PM, Mika Kuoppala wrote: >> >When dma page is setup, warn if we try to point the entries >> >to a uninitialized (zero) dma address. Like we do with gen6 > > Just a note that 0 looks only to be reserved due to a quirk of the > intel-iommu implementation. There is nothing preventing a different > iommu or future implementation using 0 as a valid dma_addr_t afaict. > > This should presumably be > WARN_ON(dma_mapping_error(&dev->pdev->dev, px_dma())); > -Chris > Ah yes. This was my paranoia from the times we updated execlists pdps with zero dma addresses. Michel pointed out that we do a proper dma_mapping_error check when we allocate the dma page. So I think this patch can be ignored. -Mika > -- > Chris Wilson, Intel Open Source Technology Centre
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 23f5896..78bfb88 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -427,6 +427,8 @@ static void gen8_initialize_pt(struct i915_address_space *vm, { gen8_pte_t scratch_pte; + WARN_ON(px_dma(vm->scratch_page) == 0); + scratch_pte = gen8_pte_encode(px_dma(vm->scratch_page), I915_CACHE_LLC, true); @@ -488,6 +490,8 @@ static void gen8_initialize_pd(struct i915_address_space *vm, { gen8_pde_t scratch_pde; + WARN_ON(px_dma(vm->scratch_pt) == 0); + scratch_pde = gen8_pde_encode(px_dma(vm->scratch_pt), I915_CACHE_LLC); fill_px(vm->dev, pd, scratch_pde);
When dma page is setup, warn if we try to point the entries to a uninitialized (zero) dma address. Like we do with gen6 Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> --- drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++++ 1 file changed, 4 insertions(+)