From patchwork Thu Jul 2 12:47:44 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joonyoung Shim X-Patchwork-Id: 6708911 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 0C5E0C05AC for ; Thu, 2 Jul 2015 12:47:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3D8182070D for ; Thu, 2 Jul 2015 12:47:48 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 54A0620791 for ; Thu, 2 Jul 2015 12:47:47 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6C5FA7A10E; Thu, 2 Jul 2015 05:47:46 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5E19C7A10E for ; Thu, 2 Jul 2015 05:47:45 -0700 (PDT) Received: from epcpsbgr4.samsung.com (u144.gpu120.samsung.co.kr [203.254.230.144]) by mailout3.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NQV032RS27J3S30@mailout3.samsung.com> for dri-devel@lists.freedesktop.org; Thu, 02 Jul 2015 21:47:43 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.112]) by epcpsbgr4.samsung.com (EPCPMTA) with SMTP id B7.EF.20564.FE235955; Thu, 2 Jul 2015 21:47:43 +0900 (KST) X-AuditID: cbfee690-f796f6d000005054-ac-559532eff94d Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 5B.DC.05312.FE235955; Thu, 2 Jul 2015 21:47:43 +0900 (KST) Received: from localhost.localdomain ([10.252.81.123]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NQV0072327JQG30@mmp2.samsung.com>; Thu, 02 Jul 2015 21:47:43 +0900 (KST) From: Joonyoung Shim To: dri-devel@lists.freedesktop.org Subject: [PATCH] drm/exynos: fix vsync interrupt clear routine of mixer Date: Thu, 02 Jul 2015 21:47:44 +0900 Message-id: <1435841264-28193-1-git-send-email-jy0922.shim@samsung.com> X-Mailer: git-send-email 1.9.1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrCLMWRmVeSWpSXmKPExsWyRsSkQPe90dRQg7lfrS2ufH3PZjHp/gQW ixf3LrJYzJj8ks2BxeN+93Emj74tqxgDmKK4bFJSczLLUov07RK4MjZsnctccJ27YsmO+SwN jJc4uxg5OSQETCRu/ZzFDGGLSVy4t54NxBYSWMooceSYEExN/7/nLF2MXEDx6YwS/7fNZ4Qo +sEo0bpFHcRmE9CTuLPtOBOILSKgLPF34iqwGmYBT4kVq+aBxYUF3CXa181i7WLk4GARUJVY eN4UJMwLFD7yfBUrxC45iZPHJrOC7JIQuM4m0fdhI9hxLAICEt8mH2IB6ZUQkJXYdADqZkmJ gytusExgFFzAyLCKUTS1ILmgOCm9yESvODG3uDQvXS85P3cTIzDwTv97NmEH470D1ocYBTgY lXh4V9RMCRViTSwrrsw9xGgKtGEis5Rocj4wvPNK4g2NzYwsTE1MjY3MLc2UxHlfS/0MFhJI TyxJzU5NLUgtii8qzUktPsTIxMEp1cDY2HNud/vZ9ztjX2T+fXNQ/HNni8WcuX+vO9YYv5EU uJrxl2lV8IfLeZMqPs2U7bOVXrPn7L/7L1TuOC353nD6rBZbygtT7cnafyolilfvkWNpqtwR pTPd0aEh+YbZlzozvnerlYMzxVKfnexmOLKQ++0V9n9FC5Tn3CmMu/vqTWj22iVHC8+lKbEU ZyQaajEXFScCAAqinjk3AgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrPLMWRmVeSWpSXmKPExsVy+t9jQd33RlNDDRpmmVtc+fqezWLS/Qks Fi/uXWSxmDH5JZsDi8f97uNMHn1bVjEGMEU1MNpkpCampBYppOYl56dk5qXbKnkHxzvHm5oZ GOoaWlqYKynkJeam2iq5+AToumXmAK1SUihLzCkFCgUkFhcr6dthmhAa4qZrAdMYoesbEgTX Y2SABhLWMGZs2DqXueA6d8WSHfNZGhgvcXYxcnJICJhI9P97zgJhi0lcuLeerYuRi0NIYDqj xP9t8xlBEkICPxglWreog9hsAnoSd7YdZwKxRQSUJf5OXAVWwyzgKbFi1TywuLCAu0T7ulms XYwcHCwCqhILz5uChHmBwkeer2KF2CUncfLYZNYJjNwLGBlWMYqmFiQXFCel5xrpFSfmFpfm pesl5+duYgQH9jPpHYyrGiwOMQpwMCrx8K6omRIqxJpYVlyZe4hRgoNZSYR3MtfUUCHelMTK qtSi/Pii0pzU4kOMpkDLJzJLiSbnA6MuryTe0NjEzMjSyNzQwsjYXEmc92S+T6iQQHpiSWp2 ampBahFMHxMHp1QD47xNCV67MmZpTQ/dqsLqMLV97REF27nqz33X2C75c1Dc44F0b/Cz8qmf 6iQKHO3yz7W8X23BLXzfoeoo/8ZP+xl8Ou9x/lhtoLM9TjPq3M03J9iDaxMW9Ww91DVz38NF UjvyLnt9bVSReXkuv3na1OzHZ8UY8zTn6UzwfLL67tyQovwMM9s9+5VYijMSDbWYi4oTAbur YDCCAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Cc: sw0312.kim@samsung.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP INT_EN_VSYNC bit is not used when we clear vsync interrupt but INT_STATUS_VSYNC bit should be related. Also, if we want to enable vsync interrupt, we should write 1 in INT_CLEAR_VSYNC bit before we set INT_EN_VSYNC bit. It will clear prior vsync interrupt. You can check it from exynos mixer user manual. Signed-off-by: Joonyoung Shim --- drivers/gpu/drm/exynos/exynos_mixer.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index cae98db..60538bf 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c @@ -739,15 +739,14 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg) atomic_set(&ctx->wait_vsync_event, 0); wake_up(&ctx->wait_vsync_queue); } - } out: - /* clear interrupts */ - if (~val & MXR_INT_EN_VSYNC) { /* vsync interrupt use different bit for read and clear */ - val &= ~MXR_INT_EN_VSYNC; + val &= ~MXR_INT_STATUS_VSYNC; val |= MXR_INT_CLEAR_VSYNC; } + + /* clear interrupts */ mixer_reg_write(res, MXR_INT_STATUS, val); spin_unlock(&res->reg_slock); @@ -907,6 +906,7 @@ static int mixer_enable_vblank(struct exynos_drm_crtc *crtc) } /* enable vsync interrupt */ + mixer_reg_write(res, MXR_INT_STATUS, MXR_INT_CLEAR_VSYNC); mixer_reg_writemask(res, MXR_INT_EN, MXR_INT_EN_VSYNC, MXR_INT_EN_VSYNC);