diff mbox

[v2,03/20] drm/i915: Fix noatomic crtc disabling.

Message ID 1436252911-5703-4-git-send-email-maarten.lankhorst@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Maarten Lankhorst July 7, 2015, 7:08 a.m. UTC
This should fix suspend on newer platforms.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Daniel Vetter July 7, 2015, 9:18 a.m. UTC | #1
On Tue, Jul 07, 2015 at 09:08:14AM +0200, Maarten Lankhorst wrote:
> This should fix suspend on newer platforms.

Which patch broke this? Also what is "newer platform" and what exactly got
fixed? Please elaborate a bit more in your commit messages, they're too
terse.
-Daniel

> 
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 6ddb462b4124..4d1a474e0d13 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6179,6 +6179,8 @@ static void intel_crtc_disable_noatomic(struct drm_crtc *crtc)
>  	for_each_power_domain(domain, domains)
>  		intel_display_power_put(dev_priv, domain);
>  	intel_crtc->enabled_power_domains = 0;
> +	intel_crtc->active = false;
> +	intel_disable_shared_dpll(intel_crtc);
>  }
>  
>  /*
> -- 
> 2.1.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Maarten Lankhorst July 7, 2015, 10:22 a.m. UTC | #2
Op 07-07-15 om 11:18 schreef Daniel Vetter:
> On Tue, Jul 07, 2015 at 09:08:14AM +0200, Maarten Lankhorst wrote:
>> This should fix suspend on newer platforms.
> Which patch broke this? Also what is "newer platform" and what exactly got
> fixed? Please elaborate a bit more in your commit messages, they're too
> terse.
There were a lot of warnings about active mismatches and power well not being idle on suspend.

This should fix the power well by disabling the shared dpll and unsetting crtc->active.
Patrik Jakobsson July 7, 2015, 12:39 p.m. UTC | #3
On Tue, Jul 07, 2015 at 12:22:12PM +0200, Maarten Lankhorst wrote:
> Op 07-07-15 om 11:18 schreef Daniel Vetter:
> > On Tue, Jul 07, 2015 at 09:08:14AM +0200, Maarten Lankhorst wrote:
> >> This should fix suspend on newer platforms.
> > Which patch broke this? Also what is "newer platform" and what exactly got
> > fixed? Please elaborate a bit more in your commit messages, they're too
> > terse.
> There were a lot of warnings about active mismatches and power well not being idle on suspend.
> 
> This should fix the power well by disabling the shared dpll and unsetting crtc->active.

This got broken by:

commit eddfcbcdc27fbecb33bff098967bbdd7ca75bfa6
Author: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Date:   Mon Jun 15 12:33:53 2015 +0200

    drm/i915: Update less state during modeset.
    
    No need to repeatedly call update_watermarks, or update_fbc.
    Down to a single call to update_watermarks in .crtc_enable
    
    Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
    Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
    Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
    Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

Unfortunately the patch doesn't fix the CAT_ERR on resume I'm experiencing on
SKL. An additional intel_update_watermarks() is needed to set DDB back to 0,0.
Also this is required in *_crtc_disable() since we forget to do the same thing
there. Not sure we also need to take care of disabling fbc at these places?

-Patrik
Maarten Lankhorst July 7, 2015, 2:14 p.m. UTC | #4
Op 07-07-15 om 14:39 schreef Patrik Jakobsson:
> On Tue, Jul 07, 2015 at 12:22:12PM +0200, Maarten Lankhorst wrote:
>> Op 07-07-15 om 11:18 schreef Daniel Vetter:
>>> On Tue, Jul 07, 2015 at 09:08:14AM +0200, Maarten Lankhorst wrote:
>>>> This should fix suspend on newer platforms.
>>> Which patch broke this? Also what is "newer platform" and what exactly got
>>> fixed? Please elaborate a bit more in your commit messages, they're too
>>> terse.
>> There were a lot of warnings about active mismatches and power well not being idle on suspend.
>>
>> This should fix the power well by disabling the shared dpll and unsetting crtc->active.
> This got broken by:
>
> commit eddfcbcdc27fbecb33bff098967bbdd7ca75bfa6
> Author: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Date:   Mon Jun 15 12:33:53 2015 +0200
>
>     drm/i915: Update less state during modeset.
>     
>     No need to repeatedly call update_watermarks, or update_fbc.
>     Down to a single call to update_watermarks in .crtc_enable
>     
>     Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>     Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
>     Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
>     Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
>
> Unfortunately the patch doesn't fix the CAT_ERR on resume I'm experiencing on
> SKL. An additional intel_update_watermarks() is needed to set DDB back to 0,0.
> Also this is required in *_crtc_disable() since we forget to do the same thing
> there. Not sure we also need to take care of disabling fbc at these places?
I would prefer to have this fix, and leave updating the watermark code out of crtc disable.

Does it work If you add a intel_update_watermarks to the noatomic function?

~Maarten
Patrik Jakobsson July 8, 2015, 8:12 a.m. UTC | #5
On Tue, Jul 07, 2015 at 04:14:01PM +0200, Maarten Lankhorst wrote:
> Op 07-07-15 om 14:39 schreef Patrik Jakobsson:
> > On Tue, Jul 07, 2015 at 12:22:12PM +0200, Maarten Lankhorst wrote:
> >> Op 07-07-15 om 11:18 schreef Daniel Vetter:
> >>> On Tue, Jul 07, 2015 at 09:08:14AM +0200, Maarten Lankhorst wrote:
> >>>> This should fix suspend on newer platforms.
> >>> Which patch broke this? Also what is "newer platform" and what exactly got
> >>> fixed? Please elaborate a bit more in your commit messages, they're too
> >>> terse.
> >> There were a lot of warnings about active mismatches and power well not being idle on suspend.
> >>
> >> This should fix the power well by disabling the shared dpll and unsetting crtc->active.
> > This got broken by:
> >
> > commit eddfcbcdc27fbecb33bff098967bbdd7ca75bfa6
> > Author: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> > Date:   Mon Jun 15 12:33:53 2015 +0200
> >
> >     drm/i915: Update less state during modeset.
> >     
> >     No need to repeatedly call update_watermarks, or update_fbc.
> >     Down to a single call to update_watermarks in .crtc_enable
> >     
> >     Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> >     Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> >     Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
> >     Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> >
> > Unfortunately the patch doesn't fix the CAT_ERR on resume I'm experiencing on
> > SKL. An additional intel_update_watermarks() is needed to set DDB back to 0,0.
> > Also this is required in *_crtc_disable() since we forget to do the same thing
> > there. Not sure we also need to take care of disabling fbc at these places?
> I would prefer to have this fix, and leave updating the watermark code out of crtc disable.
> 
> Does it work If you add a intel_update_watermarks to the noatomic function?

No that doesn't help. The only other callsite I can find is __intel_set_mode()
so I guess watermarks need updating there as well.
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 6ddb462b4124..4d1a474e0d13 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6179,6 +6179,8 @@  static void intel_crtc_disable_noatomic(struct drm_crtc *crtc)
 	for_each_power_domain(domain, domains)
 		intel_display_power_put(dev_priv, domain);
 	intel_crtc->enabled_power_domains = 0;
+	intel_crtc->active = false;
+	intel_disable_shared_dpll(intel_crtc);
 }
 
 /*