[1/3] ARM: OMAP2+: N900: always enable IBE bit
diff mbox

Message ID 1437612483-30160-2-git-send-email-sre@kernel.org
State New
Headers show

Commit Message

Sebastian Reichel July 23, 2015, 12:48 a.m. UTC
The kernel's workaround for Errata 430973 consists of a BTAC/BTB
flush at context switch. This requires the IBE bit being set, which
should normally be done by the bootloader.

Since the Nokia N900's bootloader is not easily replaceable,
a pdata quirk enables the IBE bit for the Nokia N900. Until
e748994f5cc5, the flush at context switch required
CONFIG_ARM_ERRATA_430973, so the same check has been used
for setting the IBE bit.

Since all sold N900s are assumed to be affected, the guard
can be removed now, so that the IBE bit is always set.

Signed-off-by: Sebastian Reichel <sre@kernel.org>
---
 arch/arm/mach-omap2/board-rx51.c   |  2 --
 arch/arm/mach-omap2/pdata-quirks.c | 11 ++---------
 2 files changed, 2 insertions(+), 11 deletions(-)

Comments

Tony Lindgren July 23, 2015, 7:28 a.m. UTC | #1
* Sebastian Reichel <sre@kernel.org> [150722 17:50]:
> The kernel's workaround for Errata 430973 consists of a BTAC/BTB
> flush at context switch. This requires the IBE bit being set, which
> should normally be done by the bootloader.
> 
> Since the Nokia N900's bootloader is not easily replaceable,
> a pdata quirk enables the IBE bit for the Nokia N900. Until
> e748994f5cc5, the flush at context switch required
> CONFIG_ARM_ERRATA_430973, so the same check has been used
> for setting the IBE bit.
> 
> Since all sold N900s are assumed to be affected, the guard
> can be removed now, so that the IBE bit is always set.

OK makes sense to me. It's best that you upload these into
Russell's patch tracking system after waiting for some more
comments. Please feel free to add for the whole series:

Acked-by: Tony Lindgren <tony@atomide.com>
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Pavel Machek Oct. 5, 2015, 1:53 p.m. UTC | #2
Hi!

> The kernel's workaround for Errata 430973 consists of a BTAC/BTB
> flush at context switch. This requires the IBE bit being set, which
> should normally be done by the bootloader.
> 
> Since the Nokia N900's bootloader is not easily replaceable,
> a pdata quirk enables the IBE bit for the Nokia N900. Until
> e748994f5cc5, the flush at context switch required
> CONFIG_ARM_ERRATA_430973, so the same check has been used
> for setting the IBE bit.
> 
> Since all sold N900s are assumed to be affected, the guard
> can be removed now, so that the IBE bit is always set.

Is the qemu affected?

Does qemu have enough secure support not to fail on this?

Best regards,

							Pavel
> 
> Signed-off-by: Sebastian Reichel <sre@kernel.org>
> ---
>  arch/arm/mach-omap2/board-rx51.c   |  2 --
>  arch/arm/mach-omap2/pdata-quirks.c | 11 ++---------
>  2 files changed, 2 insertions(+), 11 deletions(-)
> 
> diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
> index 2d1e5a6..3df01cc 100644
> --- a/arch/arm/mach-omap2/board-rx51.c
> +++ b/arch/arm/mach-omap2/board-rx51.c
> @@ -108,11 +108,9 @@ static void __init rx51_init(void)
>  	rx51_peripherals_init();
>  
>  	if (omap_type() == OMAP2_DEVICE_TYPE_SEC) {
> -#ifdef CONFIG_ARM_ERRATA_430973
>  		pr_info("RX-51: Enabling ARM errata 430973 workaround\n");
>  		/* set IBE to 1 */
>  		rx51_secure_update_aux_cr(BIT(6), 0);
> -#endif
>  	}
>  
>  	/* Ensure SDRC pins are mux'd for self-refresh */
> diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
> index 821171c..0aa438d 100644
> --- a/arch/arm/mach-omap2/pdata-quirks.c
> +++ b/arch/arm/mach-omap2/pdata-quirks.c
> @@ -249,18 +249,11 @@ static void __init nokia_n900_legacy_init(void)
>  	hsmmc2_internal_input_clk();
>  
>  	if (omap_type() == OMAP2_DEVICE_TYPE_SEC) {
> -		if (IS_ENABLED(CONFIG_ARM_ERRATA_430973)) {
> -			pr_info("RX-51: Enabling ARM errata 430973 workaround\n");
> -			/* set IBE to 1 */
> -			rx51_secure_update_aux_cr(BIT(6), 0);
> -		} else {
> -			pr_warn("RX-51: Not enabling ARM errata 430973 workaround\n");
> -			pr_warn("Thumb binaries may crash randomly without this workaround\n");
> -		}
> +		pr_info("RX-51: Enabling ARM errata 430973 workaround\n");
> +		rx51_secure_update_aux_cr(BIT(6), 0); /* set IBE to 1 */
>  
>  		pr_info("RX-51: Registring OMAP3 HWRNG device\n");
>  		platform_device_register(&omap3_rom_rng_device);
> -
>  	}
>  }
>  
> -- 
> 2.1.4
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Patch
diff mbox

diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 2d1e5a6..3df01cc 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -108,11 +108,9 @@  static void __init rx51_init(void)
 	rx51_peripherals_init();
 
 	if (omap_type() == OMAP2_DEVICE_TYPE_SEC) {
-#ifdef CONFIG_ARM_ERRATA_430973
 		pr_info("RX-51: Enabling ARM errata 430973 workaround\n");
 		/* set IBE to 1 */
 		rx51_secure_update_aux_cr(BIT(6), 0);
-#endif
 	}
 
 	/* Ensure SDRC pins are mux'd for self-refresh */
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index 821171c..0aa438d 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -249,18 +249,11 @@  static void __init nokia_n900_legacy_init(void)
 	hsmmc2_internal_input_clk();
 
 	if (omap_type() == OMAP2_DEVICE_TYPE_SEC) {
-		if (IS_ENABLED(CONFIG_ARM_ERRATA_430973)) {
-			pr_info("RX-51: Enabling ARM errata 430973 workaround\n");
-			/* set IBE to 1 */
-			rx51_secure_update_aux_cr(BIT(6), 0);
-		} else {
-			pr_warn("RX-51: Not enabling ARM errata 430973 workaround\n");
-			pr_warn("Thumb binaries may crash randomly without this workaround\n");
-		}
+		pr_info("RX-51: Enabling ARM errata 430973 workaround\n");
+		rx51_secure_update_aux_cr(BIT(6), 0); /* set IBE to 1 */
 
 		pr_info("RX-51: Registring OMAP3 HWRNG device\n");
 		platform_device_register(&omap3_rom_rng_device);
-
 	}
 }