From patchwork Tue Aug 4 13:54:21 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Scott Shu X-Patchwork-Id: 6939681 Return-Path: X-Original-To: patchwork-linux-mediatek@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 5A9ED9F39D for ; Tue, 4 Aug 2015 13:56:05 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3E86520532 for ; Tue, 4 Aug 2015 13:56:04 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 52DBA2041C for ; Tue, 4 Aug 2015 13:56:03 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZMchG-0008BF-Qr; Tue, 04 Aug 2015 13:56:02 +0000 Received: from [210.61.82.183] (helo=mailgw01.mediatek.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZMcgW-0006am-Fo; Tue, 04 Aug 2015 13:55:17 +0000 X-Listener-Flag: 11101 Received: from mtkhts09.mediatek.inc [(172.21.101.70)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1441216241; Tue, 04 Aug 2015 21:54:28 +0800 Received: from mtkslt201.mediatek.inc (10.21.15.54) by mtkhts09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.181.6; Tue, 4 Aug 2015 21:54:28 +0800 From: Scott Shu To: Matthias Brugger , Sascha Hauer , Mark Rutland Subject: [PATCH v3 5/8] ARM: mediatek: add smp bringup code for MT6580 Date: Tue, 4 Aug 2015 21:54:21 +0800 Message-ID: <1438696464-59858-6-git-send-email-scott.shu@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1438696464-59858-1-git-send-email-scott.shu@mediatek.com> References: <1438696464-59858-1-git-send-email-scott.shu@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150804_065516_787693_39940D03 X-CRM114-Status: GOOD ( 19.53 ) X-Spam-Score: -1.1 (-) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, wsd_upstream@mediatek.com, scott.shu@gmail.com, loda.chou@mediatek.com, linux-kernel@vger.kernel.org, jades.shih@mediatek.com, Scott Shu , linux-mediatek@lists.infradead.org, Mars.Cheng@mediatek.com, linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add support for cpu enable-method "mediatek,mt6580-smp" for booting secondary CPUs on MT6580. Signed-off-by: Scott Shu --- arch/arm/mach-mediatek/platsmp.c | 137 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 137 insertions(+) diff --git a/arch/arm/mach-mediatek/platsmp.c b/arch/arm/mach-mediatek/platsmp.c index a5bc108..94f7865 100644 --- a/arch/arm/mach-mediatek/platsmp.c +++ b/arch/arm/mach-mediatek/platsmp.c @@ -21,10 +21,16 @@ #include #include #include +#include +#include + +#include #define MTK_MAX_CPU 8 #define MTK_SMP_REG_SIZE 0x1000 +static DEFINE_SPINLOCK(boot_lock); + struct mtk_smp_boot_info { unsigned long smp_base; unsigned int jump_reg; @@ -56,6 +62,126 @@ static const struct of_device_id mtk_smp_boot_infos[] __initconst = { static void __iomem *mtk_smp_base; static const struct mtk_smp_boot_info *mtk_smp_info; +#ifdef CONFIG_HOTPLUG_CPU +static int mt6580_cpu_kill(unsigned cpu) +{ + int ret; + + ret = spm_cpu_mtcmos_off(cpu, 1); + if (ret < 0) + return 0; + + return 1; +} + +static void mt6580_cpu_die(unsigned int cpu) +{ + for (;;) + cpu_do_idle(); +} +#endif + +static void write_pen_release(int val) +{ + pen_release = val; + /* Make sure this is visible to other CPUs */ + smp_wmb(); + sync_cache_w(&pen_release); +} + +/* + * Refer common "pen" secondary release method + */ +static int mt6580_boot_secondary(unsigned int cpu, struct task_struct *idle) +{ + unsigned long timeout; + int ret; + + /* + * Set synchronisation state between this boot processor + * and the secondary one + */ + spin_lock(&boot_lock); + + /* + * The secondary processor is waiting to be released from + * the holding pen - release it, then wait for it to flag + * that it has been released by resetting pen_release. + * + * Note that "pen_release" is the hardware CPU ID, whereas + * "cpu" is Linux's internal ID. + */ + write_pen_release(cpu); + + /* + * CPU power on control by SPM + */ + ret = spm_cpu_mtcmos_on(cpu); + if (ret < 0) { + spin_unlock(&boot_lock); + return -ENXIO; + } + + timeout = jiffies + (1 * HZ); + while (time_before(jiffies, timeout)) { + /* Read barrier */ + smp_rmb(); + + if (pen_release == -1) + break; + + udelay(10); + } + + /* + * Now the secondary core is starting up let it run its + * calibrations, then wait for it to finish + */ + spin_unlock(&boot_lock); + + return (pen_release != -1 ? -ENXIO : 0); +} + +static void mt6580_secondary_init(unsigned int cpu) +{ + /* + * Let the primary processor know we're out of the + * pen, then head off into the C entry point + */ + write_pen_release(-1); + + /* + * Synchronise with the boot thread. + */ + spin_lock(&boot_lock); + spin_unlock(&boot_lock); +} + +#define MT6580_INFRACFG_AO 0x10001000 +#define SW_ROM_PD BIT(31) + +static void __init mt6580_smp_prepare_cpus(unsigned int max_cpus) +{ + static void __iomem *infracfg_ao_base; + + infracfg_ao_base = ioremap(MT6580_INFRACFG_AO, 0x1000); + if (!infracfg_ao_base) { + pr_err("%s: Unable to map I/O memory\n", __func__); + return; + } + + /* Enable bootrom power down mode */ + writel_relaxed(readl(infracfg_ao_base + 0x804) | SW_ROM_PD, + infracfg_ao_base + 0x804); + + /* Write the address of slave startup into boot address + register for bootrom power down mode */ + writel_relaxed(virt_to_phys(secondary_startup_arm), + infracfg_ao_base + 0x800); + + iounmap(infracfg_ao_base); +} + static int mtk_boot_secondary(unsigned int cpu, struct task_struct *idle) { if (!mtk_smp_base) @@ -142,3 +268,14 @@ static struct smp_operations mt6589_smp_ops __initdata = { .smp_boot_secondary = mtk_boot_secondary, }; CPU_METHOD_OF_DECLARE(mt6589_smp, "mediatek,mt6589-smp", &mt6589_smp_ops); + +static struct smp_operations mt6580_smp_ops __initdata = { + .smp_prepare_cpus = mt6580_smp_prepare_cpus, + .smp_secondary_init = mt6580_secondary_init, + .smp_boot_secondary = mt6580_boot_secondary, +#ifdef CONFIG_HOTPLUG_CPU + .cpu_kill = mt6580_cpu_kill, + .cpu_die = mt6580_cpu_die, +#endif +}; +CPU_METHOD_OF_DECLARE(mt6580_smp, "mediatek,mt6580-smp", &mt6580_smp_ops);