[05/18] drm/i915: Initialize color manager and add gamma correction
diff mbox

Message ID 1438879107-22819-6-git-send-email-shashank.sharma@intel.com
State New
Headers show

Commit Message

Sharma, Shashank Aug. 6, 2015, 4:38 p.m. UTC
From: Kausal Malladi <kausalmalladi@gmail.com>

As per Color Manager design, each driver is responsible to load its
palette color correction and enhancement capabilities in the form of
a DRM blob property, so that user space can query and read.

This patch does the following:
1. Create new files intel_color_manager(.c/.h)
2. Attach CRTC Palette Capabilities property to CRTC
3. Load all CHV platform specific gamma color capabilities
for CRTC into a blob that can be accessible by user space to
query capabilities via DRM property interface.

Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Kausal Malladi <kausalmalladi@gmail.com>
---
 drivers/gpu/drm/i915/Makefile              |  3 +-
 drivers/gpu/drm/i915/intel_color_manager.c | 83 ++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_color_manager.h | 33 ++++++++++++
 drivers/gpu/drm/i915/intel_display.c       |  2 +
 drivers/gpu/drm/i915/intel_drv.h           |  4 ++
 5 files changed, 124 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/i915/intel_color_manager.c
 create mode 100644 drivers/gpu/drm/i915/intel_color_manager.h

Comments

Matt Roper Aug. 21, 2015, 10:40 p.m. UTC | #1
On Thu, Aug 06, 2015 at 10:08:14PM +0530, Shashank Sharma wrote:
> From: Kausal Malladi <kausalmalladi@gmail.com>
> 
> As per Color Manager design, each driver is responsible to load its
> palette color correction and enhancement capabilities in the form of
> a DRM blob property, so that user space can query and read.
> 
> This patch does the following:
> 1. Create new files intel_color_manager(.c/.h)
> 2. Attach CRTC Palette Capabilities property to CRTC
> 3. Load all CHV platform specific gamma color capabilities
> for CRTC into a blob that can be accessible by user space to
> query capabilities via DRM property interface.
> 
> Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
> Signed-off-by: Kausal Malladi <kausalmalladi@gmail.com>
> ---
>  drivers/gpu/drm/i915/Makefile              |  3 +-
>  drivers/gpu/drm/i915/intel_color_manager.c | 83 ++++++++++++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_color_manager.h | 33 ++++++++++++
>  drivers/gpu/drm/i915/intel_display.c       |  2 +
>  drivers/gpu/drm/i915/intel_drv.h           |  4 ++
>  5 files changed, 124 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/gpu/drm/i915/intel_color_manager.c
>  create mode 100644 drivers/gpu/drm/i915/intel_color_manager.h
> 
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 41fb8a9..303b903 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -60,7 +60,8 @@ i915-y += intel_audio.o \
>  	  intel_overlay.o \
>  	  intel_psr.o \
>  	  intel_sideband.o \
> -	  intel_sprite.o
> +	  intel_sprite.o \
> +	  intel_color_manager.o
>  i915-$(CONFIG_ACPI)		+= intel_acpi.o intel_opregion.o
>  i915-$(CONFIG_DRM_I915_FBDEV)	+= intel_fbdev.o
>  
> diff --git a/drivers/gpu/drm/i915/intel_color_manager.c b/drivers/gpu/drm/i915/intel_color_manager.c
> new file mode 100644
> index 0000000..1c9c477
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/intel_color_manager.c
> @@ -0,0 +1,83 @@
> +/*
> + * Copyright © 2015 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + *
> + * Authors:
> + * Shashank Sharma <shashank.sharma@intel.com>
> + * Kausal Malladi <Kausal.Malladi@intel.com>
> + */
> +
> +#include "intel_color_manager.h"
> +
> +int get_chv_pipe_gamma_capabilities(struct drm_device *dev,
> +		struct drm_palette_caps *palette_caps, struct drm_crtc *crtc)
> +{
> +	struct drm_property_blob *blob;
> +
> +	/*
> +	 * This function exposes best capability for DeGamma and Gamma
> +	 * For CHV, the DeGamma LUT has 65 entries
> +	 * and the best Gamma capability has 257 entries (CGM unit)
> +	 */
> +	palette_caps->version = CHV_PALETTE_STRUCT_VERSION;
> +	palette_caps->num_samples_before_ctm =
> +		CHV_DEGAMMA_MAX_VALS;
> +	palette_caps->num_samples_after_ctm =
> +		CHV_10BIT_GAMMA_MAX_VALS;
> +
> +	blob = drm_property_create_blob(dev, sizeof(struct drm_palette_caps),
> +			(const void *) palette_caps);
> +
> +	if (blob)
> +		return blob->base.id;

It's a corner case, but blob could be a non-NULL error code here (e.g.,
-ENOMEM).  We should probably check for that before we try to
dereference it.

> +
> +	return 0;
> +}
> +
> +int get_pipe_gamma_capabilities(struct drm_device *dev,
> +		struct drm_palette_caps *palette_caps, struct drm_crtc *crtc)
> +{
> +	if (IS_CHERRYVIEW(dev))
> +		return get_chv_pipe_gamma_capabilities(dev, palette_caps, crtc);
> +	return -EINVAL;

We only call this function in the IS_CHERRYVIEW case at the moment, so I
realize the EINVAL return is technically dead code, but going forward
would it make more sense to return a valid capabilities blob that
explicitly tells userspace we have no capabilities?

> +}
> +
> +void intel_attach_color_properties_to_crtc(struct drm_device *dev,
> +		struct drm_mode_object *mode_obj)
> +{
> +	struct drm_mode_config *config = &dev->mode_config;
> +	struct drm_palette_caps *palette_caps;
> +	struct drm_crtc *crtc;
> +	int capabilities_blob_id;
> +
> +	if (IS_CHERRYVIEW(dev)) {
> +		crtc = obj_to_crtc(mode_obj);
> +
> +		palette_caps = kzalloc(sizeof(struct drm_palette_caps),
> +				GFP_KERNEL);
> +		capabilities_blob_id = get_pipe_gamma_capabilities(dev, palette_caps, crtc);
> +		kfree(palette_caps);
> +		if (config->cm_crtc_palette_capabilities_property)
> +			drm_object_attach_property(mode_obj,
> +				config->cm_crtc_palette_capabilities_property,
> +				capabilities_blob_id);
> +	}
> +}
> diff --git a/drivers/gpu/drm/i915/intel_color_manager.h b/drivers/gpu/drm/i915/intel_color_manager.h
> new file mode 100644
> index 0000000..51aeb91
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/intel_color_manager.h
> @@ -0,0 +1,33 @@
> +/*
> + * Copyright © 2015 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + *
> + * Authors:
> + * Shashank Sharma <shashank.sharma@intel.com>
> + * Kausal Malladi <Kausal.Malladi@intel.com>
> + */
> +#include <drm/drmP.h>
> +#include <drm/drm_crtc_helper.h>
> +#include "i915_drv.h"
> +
> +#define CHV_PALETTE_STRUCT_VERSION		1
> +#define CHV_DEGAMMA_MAX_VALS			65
> +#define CHV_10BIT_GAMMA_MAX_VALS		257
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 1412e21..349a1c2 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -13975,6 +13975,8 @@ static void intel_crtc_init(struct drm_device *dev, int pipe)
>  
>  	intel_crtc->wm.cxsr_allowed = true;
>  
> +	intel_attach_color_properties_to_crtc(dev, &intel_crtc->base.base);
> +

I feel like we should hold off on actually calling this function until
the very end of your patch series.  If someone is bisecting through
histroy to track down a bug and they land on this commit, we'll be
advertising some capabilities to userspace that you don't really have
yet (since they only show up in the later patches of the series).
If we wait until the end of the series to "flip the switch" and enable
color management, then we don't have to worry about running partially
implemented features during a bisect session.


Matt

>  	BUG_ON(pipe >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) ||
>  	       dev_priv->plane_to_crtc_mapping[intel_crtc->plane] != NULL);
>  	dev_priv->plane_to_crtc_mapping[intel_crtc->plane] = &intel_crtc->base;
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index b3dc138..dee5f91 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1438,4 +1438,8 @@ void intel_plane_destroy_state(struct drm_plane *plane,
>  			       struct drm_plane_state *state);
>  extern const struct drm_plane_helper_funcs intel_plane_helper_funcs;
>  
> +/* intel_color_manager.c */
> +void intel_attach_color_properties_to_crtc(struct drm_device *dev,
> +		struct drm_mode_object *mode_obj);
> +
>  #endif /* __INTEL_DRV_H__ */
> -- 
> 1.9.1
>
Sharma, Shashank Aug. 22, 2015, 6:08 a.m. UTC | #2
Regards
Shashank

On 8/22/2015 4:10 AM, Matt Roper wrote:
> On Thu, Aug 06, 2015 at 10:08:14PM +0530, Shashank Sharma wrote:
>> From: Kausal Malladi <kausalmalladi@gmail.com>
>>
>> As per Color Manager design, each driver is responsible to load its
>> palette color correction and enhancement capabilities in the form of
>> a DRM blob property, so that user space can query and read.
>>
>> This patch does the following:
>> 1. Create new files intel_color_manager(.c/.h)
>> 2. Attach CRTC Palette Capabilities property to CRTC
>> 3. Load all CHV platform specific gamma color capabilities
>> for CRTC into a blob that can be accessible by user space to
>> query capabilities via DRM property interface.
>>
>> Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
>> Signed-off-by: Kausal Malladi <kausalmalladi@gmail.com>
>> ---
>>   drivers/gpu/drm/i915/Makefile              |  3 +-
>>   drivers/gpu/drm/i915/intel_color_manager.c | 83 ++++++++++++++++++++++++++++++
>>   drivers/gpu/drm/i915/intel_color_manager.h | 33 ++++++++++++
>>   drivers/gpu/drm/i915/intel_display.c       |  2 +
>>   drivers/gpu/drm/i915/intel_drv.h           |  4 ++
>>   5 files changed, 124 insertions(+), 1 deletion(-)
>>   create mode 100644 drivers/gpu/drm/i915/intel_color_manager.c
>>   create mode 100644 drivers/gpu/drm/i915/intel_color_manager.h
>>
>> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
>> index 41fb8a9..303b903 100644
>> --- a/drivers/gpu/drm/i915/Makefile
>> +++ b/drivers/gpu/drm/i915/Makefile
>> @@ -60,7 +60,8 @@ i915-y += intel_audio.o \
>>   	  intel_overlay.o \
>>   	  intel_psr.o \
>>   	  intel_sideband.o \
>> -	  intel_sprite.o
>> +	  intel_sprite.o \
>> +	  intel_color_manager.o
>>   i915-$(CONFIG_ACPI)		+= intel_acpi.o intel_opregion.o
>>   i915-$(CONFIG_DRM_I915_FBDEV)	+= intel_fbdev.o
>>
>> diff --git a/drivers/gpu/drm/i915/intel_color_manager.c b/drivers/gpu/drm/i915/intel_color_manager.c
>> new file mode 100644
>> index 0000000..1c9c477
>> --- /dev/null
>> +++ b/drivers/gpu/drm/i915/intel_color_manager.c
>> @@ -0,0 +1,83 @@
>> +/*
>> + * Copyright © 2015 Intel Corporation
>> + *
>> + * Permission is hereby granted, free of charge, to any person obtaining a
>> + * copy of this software and associated documentation files (the "Software"),
>> + * to deal in the Software without restriction, including without limitation
>> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
>> + * and/or sell copies of the Software, and to permit persons to whom the
>> + * Software is furnished to do so, subject to the following conditions:
>> + *
>> + * The above copyright notice and this permission notice (including the next
>> + * paragraph) shall be included in all copies or substantial portions of the
>> + * Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
>> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
>> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
>> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
>> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
>> + * IN THE SOFTWARE.
>> + *
>> + * Authors:
>> + * Shashank Sharma <shashank.sharma@intel.com>
>> + * Kausal Malladi <Kausal.Malladi@intel.com>
>> + */
>> +
>> +#include "intel_color_manager.h"
>> +
>> +int get_chv_pipe_gamma_capabilities(struct drm_device *dev,
>> +		struct drm_palette_caps *palette_caps, struct drm_crtc *crtc)
>> +{
>> +	struct drm_property_blob *blob;
>> +
>> +	/*
>> +	 * This function exposes best capability for DeGamma and Gamma
>> +	 * For CHV, the DeGamma LUT has 65 entries
>> +	 * and the best Gamma capability has 257 entries (CGM unit)
>> +	 */
>> +	palette_caps->version = CHV_PALETTE_STRUCT_VERSION;
>> +	palette_caps->num_samples_before_ctm =
>> +		CHV_DEGAMMA_MAX_VALS;
>> +	palette_caps->num_samples_after_ctm =
>> +		CHV_10BIT_GAMMA_MAX_VALS;
>> +
>> +	blob = drm_property_create_blob(dev, sizeof(struct drm_palette_caps),
>> +			(const void *) palette_caps);
>> +
>> +	if (blob)
>> +		return blob->base.id;
>
> It's a corner case, but blob could be a non-NULL error code here (e.g.,
> -ENOMEM).  We should probably check for that before we try to
> dereference it.
>
Agree, will check it.
>> +
>> +	return 0;
>> +}
>> +
>> +int get_pipe_gamma_capabilities(struct drm_device *dev,
>> +		struct drm_palette_caps *palette_caps, struct drm_crtc *crtc)
>> +{
>> +	if (IS_CHERRYVIEW(dev))
>> +		return get_chv_pipe_gamma_capabilities(dev, palette_caps, crtc);
>> +	return -EINVAL;
>
> We only call this function in the IS_CHERRYVIEW case at the moment, so I
> realize the EINVAL return is technically dead code, but going forward
> would it make more sense to return a valid capabilities blob that
> explicitly tells userspace we have no capabilities?
This function is more or less a platform check wrapper, which checks if 
color correction is called for a supported platform. In the next patch 
sets, we have IS_GEN9() and IS_BDW() coming here, and if we fail to find 
the right platform, we are returning -EINVAL for invalid platform.
May be a DRM_ERROR("Invalid platform for color correction") will do the 
justice ?
>
>> +}
>> +
>> +void intel_attach_color_properties_to_crtc(struct drm_device *dev,
>> +		struct drm_mode_object *mode_obj)
>> +{
>> +	struct drm_mode_config *config = &dev->mode_config;
>> +	struct drm_palette_caps *palette_caps;
>> +	struct drm_crtc *crtc;
>> +	int capabilities_blob_id;
>> +
>> +	if (IS_CHERRYVIEW(dev)) {
>> +		crtc = obj_to_crtc(mode_obj);
>> +
>> +		palette_caps = kzalloc(sizeof(struct drm_palette_caps),
>> +				GFP_KERNEL);
>> +		capabilities_blob_id = get_pipe_gamma_capabilities(dev, palette_caps, crtc);
>> +		kfree(palette_caps);
>> +		if (config->cm_crtc_palette_capabilities_property)
>> +			drm_object_attach_property(mode_obj,
>> +				config->cm_crtc_palette_capabilities_property,
>> +				capabilities_blob_id);
>> +	}
>> +}
>> diff --git a/drivers/gpu/drm/i915/intel_color_manager.h b/drivers/gpu/drm/i915/intel_color_manager.h
>> new file mode 100644
>> index 0000000..51aeb91
>> --- /dev/null
>> +++ b/drivers/gpu/drm/i915/intel_color_manager.h
>> @@ -0,0 +1,33 @@
>> +/*
>> + * Copyright © 2015 Intel Corporation
>> + *
>> + * Permission is hereby granted, free of charge, to any person obtaining a
>> + * copy of this software and associated documentation files (the "Software"),
>> + * to deal in the Software without restriction, including without limitation
>> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
>> + * and/or sell copies of the Software, and to permit persons to whom the
>> + * Software is furnished to do so, subject to the following conditions:
>> + *
>> + * The above copyright notice and this permission notice (including the next
>> + * paragraph) shall be included in all copies or substantial portions of the
>> + * Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
>> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
>> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
>> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
>> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
>> + * IN THE SOFTWARE.
>> + *
>> + * Authors:
>> + * Shashank Sharma <shashank.sharma@intel.com>
>> + * Kausal Malladi <Kausal.Malladi@intel.com>
>> + */
>> +#include <drm/drmP.h>
>> +#include <drm/drm_crtc_helper.h>
>> +#include "i915_drv.h"
>> +
>> +#define CHV_PALETTE_STRUCT_VERSION		1
>> +#define CHV_DEGAMMA_MAX_VALS			65
>> +#define CHV_10BIT_GAMMA_MAX_VALS		257
>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>> index 1412e21..349a1c2 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -13975,6 +13975,8 @@ static void intel_crtc_init(struct drm_device *dev, int pipe)
>>
>>   	intel_crtc->wm.cxsr_allowed = true;
>>
>> +	intel_attach_color_properties_to_crtc(dev, &intel_crtc->base.base);
>> +
>
> I feel like we should hold off on actually calling this function until
> the very end of your patch series.  If someone is bisecting through
> histroy to track down a bug and they land on this commit, we'll be
> advertising some capabilities to userspace that you don't really have
> yet (since they only show up in the later patches of the series).
> If we wait until the end of the series to "flip the switch" and enable
> color management, then we don't have to worry about running partially
> implemented features during a bisect session.
>
>
> Matt
>
I was afraid of getting review comments like "add the function only when 
you are using it" so I added the call here. Also we thought it would be 
preferable to add this in the patch where actually initialize the color 
management. If you still think we should move it, I can do it.
>>   	BUG_ON(pipe >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) ||
>>   	       dev_priv->plane_to_crtc_mapping[intel_crtc->plane] != NULL);
>>   	dev_priv->plane_to_crtc_mapping[intel_crtc->plane] = &intel_crtc->base;
>> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
>> index b3dc138..dee5f91 100644
>> --- a/drivers/gpu/drm/i915/intel_drv.h
>> +++ b/drivers/gpu/drm/i915/intel_drv.h
>> @@ -1438,4 +1438,8 @@ void intel_plane_destroy_state(struct drm_plane *plane,
>>   			       struct drm_plane_state *state);
>>   extern const struct drm_plane_helper_funcs intel_plane_helper_funcs;
>>
>> +/* intel_color_manager.c */
>> +void intel_attach_color_properties_to_crtc(struct drm_device *dev,
>> +		struct drm_mode_object *mode_obj);
>> +
>>   #endif /* __INTEL_DRV_H__ */
>> --
>> 1.9.1
>>
>

Patch
diff mbox

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 41fb8a9..303b903 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -60,7 +60,8 @@  i915-y += intel_audio.o \
 	  intel_overlay.o \
 	  intel_psr.o \
 	  intel_sideband.o \
-	  intel_sprite.o
+	  intel_sprite.o \
+	  intel_color_manager.o
 i915-$(CONFIG_ACPI)		+= intel_acpi.o intel_opregion.o
 i915-$(CONFIG_DRM_I915_FBDEV)	+= intel_fbdev.o
 
diff --git a/drivers/gpu/drm/i915/intel_color_manager.c b/drivers/gpu/drm/i915/intel_color_manager.c
new file mode 100644
index 0000000..1c9c477
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_color_manager.c
@@ -0,0 +1,83 @@ 
+/*
+ * Copyright © 2015 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Shashank Sharma <shashank.sharma@intel.com>
+ * Kausal Malladi <Kausal.Malladi@intel.com>
+ */
+
+#include "intel_color_manager.h"
+
+int get_chv_pipe_gamma_capabilities(struct drm_device *dev,
+		struct drm_palette_caps *palette_caps, struct drm_crtc *crtc)
+{
+	struct drm_property_blob *blob;
+
+	/*
+	 * This function exposes best capability for DeGamma and Gamma
+	 * For CHV, the DeGamma LUT has 65 entries
+	 * and the best Gamma capability has 257 entries (CGM unit)
+	 */
+	palette_caps->version = CHV_PALETTE_STRUCT_VERSION;
+	palette_caps->num_samples_before_ctm =
+		CHV_DEGAMMA_MAX_VALS;
+	palette_caps->num_samples_after_ctm =
+		CHV_10BIT_GAMMA_MAX_VALS;
+
+	blob = drm_property_create_blob(dev, sizeof(struct drm_palette_caps),
+			(const void *) palette_caps);
+
+	if (blob)
+		return blob->base.id;
+
+	return 0;
+}
+
+int get_pipe_gamma_capabilities(struct drm_device *dev,
+		struct drm_palette_caps *palette_caps, struct drm_crtc *crtc)
+{
+	if (IS_CHERRYVIEW(dev))
+		return get_chv_pipe_gamma_capabilities(dev, palette_caps, crtc);
+	return -EINVAL;
+}
+
+void intel_attach_color_properties_to_crtc(struct drm_device *dev,
+		struct drm_mode_object *mode_obj)
+{
+	struct drm_mode_config *config = &dev->mode_config;
+	struct drm_palette_caps *palette_caps;
+	struct drm_crtc *crtc;
+	int capabilities_blob_id;
+
+	if (IS_CHERRYVIEW(dev)) {
+		crtc = obj_to_crtc(mode_obj);
+
+		palette_caps = kzalloc(sizeof(struct drm_palette_caps),
+				GFP_KERNEL);
+		capabilities_blob_id = get_pipe_gamma_capabilities(dev, palette_caps, crtc);
+		kfree(palette_caps);
+		if (config->cm_crtc_palette_capabilities_property)
+			drm_object_attach_property(mode_obj,
+				config->cm_crtc_palette_capabilities_property,
+				capabilities_blob_id);
+	}
+}
diff --git a/drivers/gpu/drm/i915/intel_color_manager.h b/drivers/gpu/drm/i915/intel_color_manager.h
new file mode 100644
index 0000000..51aeb91
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_color_manager.h
@@ -0,0 +1,33 @@ 
+/*
+ * Copyright © 2015 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Shashank Sharma <shashank.sharma@intel.com>
+ * Kausal Malladi <Kausal.Malladi@intel.com>
+ */
+#include <drm/drmP.h>
+#include <drm/drm_crtc_helper.h>
+#include "i915_drv.h"
+
+#define CHV_PALETTE_STRUCT_VERSION		1
+#define CHV_DEGAMMA_MAX_VALS			65
+#define CHV_10BIT_GAMMA_MAX_VALS		257
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 1412e21..349a1c2 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -13975,6 +13975,8 @@  static void intel_crtc_init(struct drm_device *dev, int pipe)
 
 	intel_crtc->wm.cxsr_allowed = true;
 
+	intel_attach_color_properties_to_crtc(dev, &intel_crtc->base.base);
+
 	BUG_ON(pipe >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) ||
 	       dev_priv->plane_to_crtc_mapping[intel_crtc->plane] != NULL);
 	dev_priv->plane_to_crtc_mapping[intel_crtc->plane] = &intel_crtc->base;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index b3dc138..dee5f91 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1438,4 +1438,8 @@  void intel_plane_destroy_state(struct drm_plane *plane,
 			       struct drm_plane_state *state);
 extern const struct drm_plane_helper_funcs intel_plane_helper_funcs;
 
+/* intel_color_manager.c */
+void intel_attach_color_properties_to_crtc(struct drm_device *dev,
+		struct drm_mode_object *mode_obj);
+
 #endif /* __INTEL_DRV_H__ */