From patchwork Thu Aug 6 16:38:17 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sharma, Shashank" X-Patchwork-Id: 6961131 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id ECB90C05AC for ; Thu, 6 Aug 2015 16:31:00 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0B9A220702 for ; Thu, 6 Aug 2015 16:31:00 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 2B169206F1 for ; Thu, 6 Aug 2015 16:30:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AAC4B7A14C; Thu, 6 Aug 2015 09:30:58 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id C56F57A149; Thu, 6 Aug 2015 09:30:56 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 06 Aug 2015 09:30:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,623,1432623600"; d="scan'208";a="779156312" Received: from shashanks-desktop.iind.intel.com ([10.223.26.81]) by orsmga002.jf.intel.com with ESMTP; 06 Aug 2015 09:30:51 -0700 From: Shashank Sharma To: dri-devel@lists.freedesktop.org, matthew.d.roper@intel.com, robert.bradford@intel.com, thierry.reding@gmail.com, gary.k.smith@intel.com, hverkuil@xs4all.nl, jim.bish@intel.com, intel-gfx@lists.freedesktop.org Date: Thu, 6 Aug 2015 22:08:17 +0530 Message-Id: <1438879107-22819-9-git-send-email-shashank.sharma@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1438879107-22819-1-git-send-email-shashank.sharma@intel.com> References: <1438879107-22819-1-git-send-email-shashank.sharma@intel.com> Cc: annie.j.matheson@intel.com, vijay.a.purushothaman@intel.com, kausalmalladi@gmail.com, jesse.barnes@intel.com, daniel.vetter@intel.com, susanta.bhattacharjee@intel.com Subject: [Intel-gfx] [PATCH 08/18] drm/i915: Add pipe gamma correction handlers X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kausal Malladi I915 driver registers gamma correction as palette correction property with DRM layer. This patch adds set_property() and get_property() handlers for pipe level gamma correction. The set function attaches the Gamma correction blob to CRTC state, these values will be committed during atomic commit. Signed-off-by: Shashank Sharma Signed-off-by: Kausal Malladi --- drivers/gpu/drm/i915/intel_atomic.c | 14 ++++++++++++++ drivers/gpu/drm/i915/intel_color_manager.c | 20 ++++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 3 +++ 3 files changed, 37 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_atomic.c b/drivers/gpu/drm/i915/intel_atomic.c index 8d04ee8..9f55e6c 100644 --- a/drivers/gpu/drm/i915/intel_atomic.c +++ b/drivers/gpu/drm/i915/intel_atomic.c @@ -324,6 +324,13 @@ int intel_crtc_atomic_set_property(struct drm_crtc *crtc, struct drm_property *property, uint64_t val) { + struct drm_device *dev = crtc->dev; + struct drm_mode_config *config = &dev->mode_config; + + if (property == config->cm_palette_after_ctm_property) + return intel_color_manager_set_pipe_gamma(dev, state, + &crtc->base, val); + DRM_DEBUG_KMS("Unknown crtc property '%s'\n", property->name); return -EINVAL; } @@ -333,5 +340,12 @@ int intel_crtc_atomic_get_property(struct drm_crtc *crtc, struct drm_property *property, uint64_t *val) { + struct drm_device *dev = crtc->dev; + struct drm_mode_config *config = &dev->mode_config; + + if (property == config->cm_palette_after_ctm_property) + *val = (state->palette_after_ctm_blob) ? + state->palette_after_ctm_blob->base.id : 0; + return 0; } diff --git a/drivers/gpu/drm/i915/intel_color_manager.c b/drivers/gpu/drm/i915/intel_color_manager.c index 1c9c477..9a6126c 100644 --- a/drivers/gpu/drm/i915/intel_color_manager.c +++ b/drivers/gpu/drm/i915/intel_color_manager.c @@ -27,6 +27,26 @@ #include "intel_color_manager.h" +int intel_color_manager_set_pipe_gamma(struct drm_device *dev, + struct drm_crtc_state *crtc_state, + struct drm_mode_object *obj, uint32_t blob_id) +{ + struct drm_property_blob *blob; + + blob = drm_property_lookup_blob(dev, blob_id); + if (!blob) { + DRM_ERROR("Invalid Blob ID\n"); + return -EINVAL; + } + + if (crtc_state->palette_after_ctm_blob) + drm_property_unreference_blob(crtc_state->palette_after_ctm_blob); + + /* Attach the blob to be commited in state */ + crtc_state->palette_after_ctm_blob = blob; + return 0; +} + int get_chv_pipe_gamma_capabilities(struct drm_device *dev, struct drm_palette_caps *palette_caps, struct drm_crtc *crtc) { diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index dee5f91..820ded7 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1441,5 +1441,8 @@ extern const struct drm_plane_helper_funcs intel_plane_helper_funcs; /* intel_color_manager.c */ void intel_attach_color_properties_to_crtc(struct drm_device *dev, struct drm_mode_object *mode_obj); +int intel_color_manager_set_pipe_gamma(struct drm_device *dev, + struct drm_crtc_state *crtc_state, + struct drm_mode_object *obj, uint32_t blob_id); #endif /* __INTEL_DRV_H__ */