[PATCH-next,2/4] arm: boot: dts: am4372: add ARM timers and SCU nodes
diff mbox

Message ID 1439409416-32673-3-git-send-email-balbi@ti.com
State New
Headers show

Commit Message

Felipe Balbi Aug. 12, 2015, 7:56 p.m. UTC
AM437x devices sport SCU, TWD and Global timers,
let's add them to DTS so they have a chance to
probe and be used by Linux.

Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 arch/arm/boot/dts/am4372.dtsi | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

Comments

Tony Lindgren Aug. 13, 2015, 8:32 a.m. UTC | #1
* Felipe Balbi <balbi@ti.com> [150812 13:00]:
> AM437x devices sport SCU, TWD and Global timers,
> let's add them to DTS so they have a chance to
> probe and be used by Linux.

Applying this one into omap-for-v4.3/dt-v2. Not sure
if it will get merged as we're getting close to the
merge window. The rest we can patch once Russell has
reverted the bogus SMP dependency.

Regards,

Tony
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Felipe Balbi Aug. 13, 2015, 3:01 p.m. UTC | #2
On Thu, Aug 13, 2015 at 01:32:15AM -0700, Tony Lindgren wrote:
> * Felipe Balbi <balbi@ti.com> [150812 13:00]:
> > AM437x devices sport SCU, TWD and Global timers,
> > let's add them to DTS so they have a chance to
> > probe and be used by Linux.
> 
> Applying this one into omap-for-v4.3/dt-v2. Not sure
> if it will get merged as we're getting close to the
> merge window. The rest we can patch once Russell has
> reverted the bogus SMP dependency.

I'm just waiting for Russell's "it's okay to post on patch system".

Patch
diff mbox

diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 51feccfa0e0a..7dfc9d8bd003 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -64,6 +64,27 @@ 
 		interrupt-parent = <&gic>;
 	};
 
+	scu: scu@48240000 {
+		compatible = "arm,cortex-a9-scu";
+		reg = <0x48240000 0x100>;
+	};
+
+	global_timer: timer@48240200 {
+		compatible = "arm,cortex-a9-global-timer";
+		reg = <0x48240200 0x100>;
+		interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-parent = <&gic>;
+		clocks = <&dpll_mpu_m2_ck>;
+	};
+
+	local_timer: timer@48240600 {
+		compatible = "arm,cortex-a9-twd-timer";
+		reg = <0x48240600 0x100>;
+		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-parent = <&gic>;
+		clocks = <&dpll_mpu_m2_ck>;
+	};
+
 	l2-cache-controller@48242000 {
 		compatible = "arm,pl310-cache";
 		reg = <0x48242000 0x1000>;