| Message ID | 1439422160-20148-4-git-send-email-tiago.vignatti@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Aug 12, 2015 at 08:29:12PM -0300, Tiago Vignatti wrote: > Signed-off-by: Tiago Vignatti <tiago.vignatti@intel.com> > --- > drivers/gpu/drm/i915/i915_gem_dmabuf.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/i915_gem_dmabuf.c > index e9c2bfd..8447ba4 100644 > --- a/drivers/gpu/drm/i915/i915_gem_dmabuf.c > +++ b/drivers/gpu/drm/i915/i915_gem_dmabuf.c > @@ -212,6 +212,15 @@ static int i915_gem_begin_cpu_access(struct dma_buf *dma_buf, size_t start, size > return ret; > } > > +static void i915_gem_end_cpu_access(struct dma_buf *dma_buf, size_t start, size_t length, enum dma_data_direction direction) > +{ > + struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf); > + bool write = (direction == DMA_BIDIRECTIONAL || direction == DMA_TO_DEVICE); > + > + if (i915_gem_object_set_to_gtt_domain(obj, write)) > + DRM_ERROR("failed to set bo into the GTT\n"); Ok, the error here should indeed be rare (would require that the buffer become active during the sync period and for the end_cpu_access to be interrupted). To be completely sure that the error is worth reporting, we should mutex_lock(&dev->struct_mutex); was_interruptible = dev_priv->mm.interruptible; dev_priv->mm.interruptible = false; ret = i915_gem_object_set_to_gtt_domain(obj, write); dev_priv->mm.interruptible = was_interruptible; mutex_unlock(&dev->struct_mutex); if (unlikely(ret)) DRM_ERROR("unable to flush buffer following CPU access; rendering may be corrupt\n"); -Chris
diff --git a/drivers/gpu/drm/i915/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/i915_gem_dmabuf.c index e9c2bfd..8447ba4 100644 --- a/drivers/gpu/drm/i915/i915_gem_dmabuf.c +++ b/drivers/gpu/drm/i915/i915_gem_dmabuf.c @@ -212,6 +212,15 @@ static int i915_gem_begin_cpu_access(struct dma_buf *dma_buf, size_t start, size return ret; } +static void i915_gem_end_cpu_access(struct dma_buf *dma_buf, size_t start, size_t length, enum dma_data_direction direction) +{ + struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf); + bool write = (direction == DMA_BIDIRECTIONAL || direction == DMA_TO_DEVICE); + + if (i915_gem_object_set_to_gtt_domain(obj, write)) + DRM_ERROR("failed to set bo into the GTT\n"); +} + static const struct dma_buf_ops i915_dmabuf_ops = { .map_dma_buf = i915_gem_map_dma_buf, .unmap_dma_buf = i915_gem_unmap_dma_buf, @@ -224,6 +233,7 @@ static const struct dma_buf_ops i915_dmabuf_ops = { .vmap = i915_gem_dmabuf_vmap, .vunmap = i915_gem_dmabuf_vunmap, .begin_cpu_access = i915_gem_begin_cpu_access, + .end_cpu_access = i915_gem_end_cpu_access, }; struct dma_buf *i915_gem_prime_export(struct drm_device *dev,
Signed-off-by: Tiago Vignatti <tiago.vignatti@intel.com> --- drivers/gpu/drm/i915/i915_gem_dmabuf.c | 10 ++++++++++ 1 file changed, 10 insertions(+)