| Message ID | 1439567010-29312-1-git-send-email-imre.deak@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, Aug 14, 2015 at 06:43:30PM +0300, Imre Deak wrote: > Due to a coherency issue on BXT A steppings we can't guarantee a > coherent view of cached (CPU snooped) GPU mappings, so fail such > requests. User space is supposed to fall back to uncached mappings in > this case. > > v2: > - limit the WA to A steppings, on later stepping this HW issue is fixed > v3: > - return error instead of trying to work around the issue in kernel, > since that could confuse user space (Chris) > > Testcast: igt/gem_store_dword_batches_loop/cached-mapping > Signed-off-by: Imre Deak <imre.deak@intel.com> I checked in the two userspaces where I have used snooping that both handle an error correctly, so Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris
On Fri, Aug 14, 2015 at 05:18:27PM +0100, Chris Wilson wrote: > On Fri, Aug 14, 2015 at 06:43:30PM +0300, Imre Deak wrote: > > Due to a coherency issue on BXT A steppings we can't guarantee a > > coherent view of cached (CPU snooped) GPU mappings, so fail such > > requests. User space is supposed to fall back to uncached mappings in > > this case. > > > > v2: > > - limit the WA to A steppings, on later stepping this HW issue is fixed > > v3: > > - return error instead of trying to work around the issue in kernel, > > since that could confuse user space (Chris) > > > > Testcast: igt/gem_store_dword_batches_loop/cached-mapping > > Signed-off-by: Imre Deak <imre.deak@intel.com> > > I checked in the two userspaces where I have used snooping that both > handle an error correctly, so > > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Both patches applied, thanks. -Daniel
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 407b6b3..95fd4ff 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -3742,6 +3742,15 @@ int i915_gem_set_caching_ioctl(struct drm_device *dev, void *data, level = I915_CACHE_NONE; break; case I915_CACHING_CACHED: + /* + * Due to a HW issue on BXT A stepping, GPU stores via a + * snooped mapping may leave stale data in a corresponding CPU + * cacheline, whereas normally such cachelines would get + * invalidated. + */ + if (IS_BROXTON(dev) && INTEL_REVID(dev) < BXT_REVID_B0) + return -ENODEV; + level = I915_CACHE_LLC; break; case I915_CACHING_DISPLAY:
Due to a coherency issue on BXT A steppings we can't guarantee a coherent view of cached (CPU snooped) GPU mappings, so fail such requests. User space is supposed to fall back to uncached mappings in this case. v2: - limit the WA to A steppings, on later stepping this HW issue is fixed v3: - return error instead of trying to work around the issue in kernel, since that could confuse user space (Chris) Testcast: igt/gem_store_dword_batches_loop/cached-mapping Signed-off-by: Imre Deak <imre.deak@intel.com> --- drivers/gpu/drm/i915/i915_gem.c | 9 +++++++++ 1 file changed, 9 insertions(+)