[1/2] ARM: dts: rockchip: add veyron-jaq board
diff mbox

Message ID 1439923455-109818-1-git-send-email-briannorris@chromium.org
State New
Headers show

Commit Message

Brian Norris Aug. 18, 2015, 6:44 p.m. UTC
a.k.a. Haier Chromebook 11

Signed-off-by: Brian Norris <briannorris@chromium.org>
Cc: Alexandru M Stan <amstan@chromium.org>
Cc: Douglas Anderson <dianders@chromium.org>
---
 arch/arm/boot/dts/Makefile              |   1 +
 arch/arm/boot/dts/rk3288-veyron-jaq.dts | 176 ++++++++++++++++++++++++++++++++
 2 files changed, 177 insertions(+)
 create mode 100644 arch/arm/boot/dts/rk3288-veyron-jaq.dts

Comments

Heiko Stübner Aug. 18, 2015, 7:19 p.m. UTC | #1
Hi Brian,


Am Dienstag, 18. August 2015, 11:44:14 schrieb Brian Norris:
> a.k.a. Haier Chromebook 11
> 
> Signed-off-by: Brian Norris <briannorris@chromium.org>
> Cc: Alexandru M Stan <amstan@chromium.org>
> Cc: Douglas Anderson <dianders@chromium.org>
> ---
>  arch/arm/boot/dts/Makefile              |   1 +
>  arch/arm/boot/dts/rk3288-veyron-jaq.dts | 176
> ++++++++++++++++++++++++++++++++ 2 files changed, 177 insertions(+)
>  create mode 100644 arch/arm/boot/dts/rk3288-veyron-jaq.dts

missing binding documentation in 
Documentation/devicetree/bindings/arm/rockchip.txt (needs new entry above 
Jerry)

> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 7805a6541a38..7a2c3c88ce9e 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -493,6 +493,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
>  	rk3288-veyron-jerry.dtb \
>  	rk3288-veyron-minnie.dtb \
>  	rk3288-veyron-pinky.dtb \
> +	rk3288-veyron-jaq.dtb \
>  	rk3288-veyron-speedy.dtb

please sort alphabetically (in this case somewhere above jerry)


>  dtb-$(CONFIG_ARCH_S3C24XX) += \
>  	s3c2416-smdk2416.dtb
> diff --git a/arch/arm/boot/dts/rk3288-veyron-jaq.dts
> b/arch/arm/boot/dts/rk3288-veyron-jaq.dts new file mode 100644
> index 000000000000..ea6130156216
> --- /dev/null
> +++ b/arch/arm/boot/dts/rk3288-veyron-jaq.dts
> @@ -0,0 +1,176 @@
> +/*
> + * Google Veyron Jaq Rev 1+ board device tree source
> + *
> + * Copyright 2015 Google, Inc
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + *  a) This file is free software; you can redistribute it and/or
> + *     modify it under the terms of the GNU General Public License as
> + *     published by the Free Software Foundation; either version 2 of the
> + *     License, or (at your option) any later version.
> + *
> + *     This file is distributed in the hope that it will be useful,
> + *     but WITHOUT ANY WARRANTY; without even the implied warranty of
> + *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + *     GNU General Public License for more details.
> + *
> + *  Or, alternatively,
> + *
> + *  b) Permission is hereby granted, free of charge, to any person
> + *     obtaining a copy of this software and associated documentation
> + *     files (the "Software"), to deal in the Software without
> + *     restriction, including without limitation the rights to use,
> + *     copy, modify, merge, publish, distribute, sublicense, and/or
> + *     sell copies of the Software, and to permit persons to whom the
> + *     Software is furnished to do so, subject to the following
> + *     conditions:
> + *
> + *     The above copyright notice and this permission notice shall be
> + *     included in all copies or substantial portions of the Software.
> + *
> + *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + *     OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +
> +#include "rk3288-veyron-chromebook.dtsi"
> +#include "cros-ec-sbs.dtsi"
> +
> +/ {
> +	model = "Google Jaq";
> +	compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4",
> +		     "google,veyron-jaq-rev3", "google,veyron-jaq-rev2",
> +		     "google,veyron-jaq-rev1", "google,veyron-jaq",
> +		     "google,veyron", "rockchip,rk3288";
> +
> +	panel_regulator: panel-regulator {
> +		compatible = "regulator-fixed";
> +		enable-active-high;
> +		gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&lcd_enable_h>;
> +		regulator-name = "panel_regulator";
> +		vin-supply = <&vcc33_sys>;
> +	};
> +
> +	vcc18_lcd: vcc18-lcd {
> +		compatible = "regulator-fixed";
> +		enable-active-high;
> +		gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&avdd_1v8_disp_en>;
> +		regulator-name = "vcc18_lcd";
> +		regulator-always-on;
> +		regulator-boot-on;
> +		vin-supply = <&vcc18_wl>;
> +	};
> +
> +	backlight_regulator: backlight-regulator {
> +		compatible = "regulator-fixed";
> +		enable-active-high;
> +		gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&bl_pwr_en>;
> +		regulator-name = "backlight_regulator";
> +		vin-supply = <&vcc33_sys>;
> +		startup-delay-us = <15000>;
> +	};

again, please alphabetically (backlight, panel, vcc*)


> +};
> +
> +&rk808 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
> +	dvs-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>,
> +		    <&gpio7 15 GPIO_ACTIVE_HIGH>;
> +
> +	regulators {
> +		mic_vcc: LDO_REG2 {
> +			regulator-name = "mic_vcc";
> +			regulator-always-on;
> +			regulator-boot-on;
> +			regulator-min-microvolt = <1800000>;
> +			regulator-max-microvolt = <1800000>;
> +			regulator-state-mem {
> +				regulator-on-in-suspend;
> +			};
> +		};
> +	};
> +};
> +
> +&sdmmc {
> +	disable-wp;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
> +			&sdmmc_bus4>;
> +};
> +
> +&vcc_5v {
> +	enable-active-high;
> +	gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&drv_5v>;
> +};
> +
> +&vcc50_hdmi {
> +	enable-active-high;
> +	gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&vcc50_hdmi_en>;
> +};
> +
> +&pinctrl {
> +	backlight {
> +		bl_pwr_en: bl_pwr_en {
> +			rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
> +		};
> +	};
> +
> +	buck-5v {
> +		drv_5v: drv-5v {
> +			rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
> +		};
> +	};
> +
> +	edp {
> +		edp_hpd: edp_hpd {
> +			rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_down>;
> +		};
> +	};
> +
> +	hdmi {
> +		vcc50_hdmi_en: vcc50-hdmi-en {
> +			rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
> +		};
> +	};
> +
> +	lcd {
> +		lcd_enable_h: lcd-en {
> +			rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
> +		};
> +
> +		avdd_1v8_disp_en: avdd-1v8-disp-en {
> +			rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
> +		};
> +	};
> +
> +	pmic {
> +		dvs_1: dvs-1 {
> +			rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
> +		};
> +
> +		dvs_2: dvs-2 {
> +			rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
> +		};
> +	};
> +};

pinctrl can stay at the bottom. It may actually improve readability, if not 
cluttering up the smaller other nodes above.


Thanks
Heiko
Brian Norris Aug. 18, 2015, 11:01 p.m. UTC | #2
Thanks for the quick review.

On Tue, Aug 18, 2015 at 09:19:05PM +0200, Heiko Stuebner wrote:
> Am Dienstag, 18. August 2015, 11:44:14 schrieb Brian Norris:
> > a.k.a. Haier Chromebook 11
> > 
> > Signed-off-by: Brian Norris <briannorris@chromium.org>
> > Cc: Alexandru M Stan <amstan@chromium.org>
> > Cc: Douglas Anderson <dianders@chromium.org>
> > ---
> >  arch/arm/boot/dts/Makefile              |   1 +
> >  arch/arm/boot/dts/rk3288-veyron-jaq.dts | 176
> > ++++++++++++++++++++++++++++++++ 2 files changed, 177 insertions(+)
> >  create mode 100644 arch/arm/boot/dts/rk3288-veyron-jaq.dts
> 
> missing binding documentation in 
> Documentation/devicetree/bindings/arm/rockchip.txt (needs new entry above 
> Jerry)

I don't know how I managed this, but I had already fixed this up in my
tree and amended the commit. I must have grabbed an old commit ref when
generating the patches... Sorry, will fix when sending v2.

> > 
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index 7805a6541a38..7a2c3c88ce9e 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -493,6 +493,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
> >  	rk3288-veyron-jerry.dtb \
> >  	rk3288-veyron-minnie.dtb \
> >  	rk3288-veyron-pinky.dtb \
> > +	rk3288-veyron-jaq.dtb \
> >  	rk3288-veyron-speedy.dtb
> 
> please sort alphabetically (in this case somewhere above jerry)

Will do.

> >  dtb-$(CONFIG_ARCH_S3C24XX) += \
> >  	s3c2416-smdk2416.dtb
> > diff --git a/arch/arm/boot/dts/rk3288-veyron-jaq.dts
> > b/arch/arm/boot/dts/rk3288-veyron-jaq.dts new file mode 100644
> > index 000000000000..ea6130156216
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/rk3288-veyron-jaq.dts
> > @@ -0,0 +1,176 @@
> > +/*
> > + * Google Veyron Jaq Rev 1+ board device tree source
> > + *
> > + * Copyright 2015 Google, Inc
> > + *
> > + * This file is dual-licensed: you can use it either under the terms
> > + * of the GPL or the X11 license, at your option. Note that this dual
> > + * licensing only applies to this file, and not this project as a
> > + * whole.
> > + *
> > + *  a) This file is free software; you can redistribute it and/or
> > + *     modify it under the terms of the GNU General Public License as
> > + *     published by the Free Software Foundation; either version 2 of the
> > + *     License, or (at your option) any later version.
> > + *
> > + *     This file is distributed in the hope that it will be useful,
> > + *     but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > + *     GNU General Public License for more details.
> > + *
> > + *  Or, alternatively,
> > + *
> > + *  b) Permission is hereby granted, free of charge, to any person
> > + *     obtaining a copy of this software and associated documentation
> > + *     files (the "Software"), to deal in the Software without
> > + *     restriction, including without limitation the rights to use,
> > + *     copy, modify, merge, publish, distribute, sublicense, and/or
> > + *     sell copies of the Software, and to permit persons to whom the
> > + *     Software is furnished to do so, subject to the following
> > + *     conditions:
> > + *
> > + *     The above copyright notice and this permission notice shall be
> > + *     included in all copies or substantial portions of the Software.
> > + *
> > + *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> > + *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> > + *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> > + *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> > + *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> > + *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> > + *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> > + *     OTHER DEALINGS IN THE SOFTWARE.
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include "rk3288-veyron-chromebook.dtsi"
> > +#include "cros-ec-sbs.dtsi"
> > +
> > +/ {
> > +	model = "Google Jaq";
> > +	compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4",
> > +		     "google,veyron-jaq-rev3", "google,veyron-jaq-rev2",
> > +		     "google,veyron-jaq-rev1", "google,veyron-jaq",
> > +		     "google,veyron", "rockchip,rk3288";
> > +
> > +	panel_regulator: panel-regulator {
> > +		compatible = "regulator-fixed";
> > +		enable-active-high;
> > +		gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&lcd_enable_h>;
> > +		regulator-name = "panel_regulator";
> > +		vin-supply = <&vcc33_sys>;
> > +	};
> > +
> > +	vcc18_lcd: vcc18-lcd {
> > +		compatible = "regulator-fixed";
> > +		enable-active-high;
> > +		gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&avdd_1v8_disp_en>;
> > +		regulator-name = "vcc18_lcd";
> > +		regulator-always-on;
> > +		regulator-boot-on;
> > +		vin-supply = <&vcc18_wl>;
> > +	};
> > +
> > +	backlight_regulator: backlight-regulator {
> > +		compatible = "regulator-fixed";
> > +		enable-active-high;
> > +		gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&bl_pwr_en>;
> > +		regulator-name = "backlight_regulator";
> > +		vin-supply = <&vcc33_sys>;
> > +		startup-delay-us = <15000>;
> > +	};
> 
> again, please alphabetically (backlight, panel, vcc*)

Actually this one was somewhat intentional; I was trying to mirror the
jerry DTS, which has very similar (nearly identical) nodes in jaq.

But I can sort however you'd like it best.

> > +};
> > +
> > +&rk808 {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
> > +	dvs-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>,
> > +		    <&gpio7 15 GPIO_ACTIVE_HIGH>;
> > +
> > +	regulators {
> > +		mic_vcc: LDO_REG2 {
> > +			regulator-name = "mic_vcc";
> > +			regulator-always-on;
> > +			regulator-boot-on;
> > +			regulator-min-microvolt = <1800000>;
> > +			regulator-max-microvolt = <1800000>;
> > +			regulator-state-mem {
> > +				regulator-on-in-suspend;
> > +			};
> > +		};
> > +	};
> > +};
> > +
> > +&sdmmc {
> > +	disable-wp;
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
> > +			&sdmmc_bus4>;
> > +};
> > +
> > +&vcc_5v {
> > +	enable-active-high;
> > +	gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&drv_5v>;
> > +};
> > +
> > +&vcc50_hdmi {
> > +	enable-active-high;
> > +	gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&vcc50_hdmi_en>;
> > +};
> > +
> > +&pinctrl {
> > +	backlight {
> > +		bl_pwr_en: bl_pwr_en {
> > +			rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
> > +		};
> > +	};
> > +
> > +	buck-5v {
> > +		drv_5v: drv-5v {
> > +			rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
> > +		};
> > +	};
> > +
> > +	edp {
> > +		edp_hpd: edp_hpd {
> > +			rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_down>;
> > +		};
> > +	};
> > +
> > +	hdmi {
> > +		vcc50_hdmi_en: vcc50-hdmi-en {
> > +			rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
> > +		};
> > +	};
> > +
> > +	lcd {
> > +		lcd_enable_h: lcd-en {
> > +			rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
> > +		};
> > +
> > +		avdd_1v8_disp_en: avdd-1v8-disp-en {
> > +			rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
> > +		};
> > +	};
> > +
> > +	pmic {
> > +		dvs_1: dvs-1 {
> > +			rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
> > +		};
> > +
> > +		dvs_2: dvs-2 {
> > +			rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
> > +		};
> > +	};
> > +};
> 
> pinctrl can stay at the bottom. It may actually improve readability, if not 
> cluttering up the smaller other nodes above.

Ok.

Brian

Patch
diff mbox

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7805a6541a38..7a2c3c88ce9e 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -493,6 +493,7 @@  dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3288-veyron-jerry.dtb \
 	rk3288-veyron-minnie.dtb \
 	rk3288-veyron-pinky.dtb \
+	rk3288-veyron-jaq.dtb \
 	rk3288-veyron-speedy.dtb
 dtb-$(CONFIG_ARCH_S3C24XX) += \
 	s3c2416-smdk2416.dtb
diff --git a/arch/arm/boot/dts/rk3288-veyron-jaq.dts b/arch/arm/boot/dts/rk3288-veyron-jaq.dts
new file mode 100644
index 000000000000..ea6130156216
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-veyron-jaq.dts
@@ -0,0 +1,176 @@ 
+/*
+ * Google Veyron Jaq Rev 1+ board device tree source
+ *
+ * Copyright 2015 Google, Inc
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *  Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "rk3288-veyron-chromebook.dtsi"
+#include "cros-ec-sbs.dtsi"
+
+/ {
+	model = "Google Jaq";
+	compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4",
+		     "google,veyron-jaq-rev3", "google,veyron-jaq-rev2",
+		     "google,veyron-jaq-rev1", "google,veyron-jaq",
+		     "google,veyron", "rockchip,rk3288";
+
+	panel_regulator: panel-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&lcd_enable_h>;
+		regulator-name = "panel_regulator";
+		vin-supply = <&vcc33_sys>;
+	};
+
+	vcc18_lcd: vcc18-lcd {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&avdd_1v8_disp_en>;
+		regulator-name = "vcc18_lcd";
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc18_wl>;
+	};
+
+	backlight_regulator: backlight-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&bl_pwr_en>;
+		regulator-name = "backlight_regulator";
+		vin-supply = <&vcc33_sys>;
+		startup-delay-us = <15000>;
+	};
+};
+
+&rk808 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
+	dvs-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>,
+		    <&gpio7 15 GPIO_ACTIVE_HIGH>;
+
+	regulators {
+		mic_vcc: LDO_REG2 {
+			regulator-name = "mic_vcc";
+			regulator-always-on;
+			regulator-boot-on;
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-state-mem {
+				regulator-on-in-suspend;
+			};
+		};
+	};
+};
+
+&sdmmc {
+	disable-wp;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
+			&sdmmc_bus4>;
+};
+
+&vcc_5v {
+	enable-active-high;
+	gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&drv_5v>;
+};
+
+&vcc50_hdmi {
+	enable-active-high;
+	gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&vcc50_hdmi_en>;
+};
+
+&pinctrl {
+	backlight {
+		bl_pwr_en: bl_pwr_en {
+			rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	buck-5v {
+		drv_5v: drv-5v {
+			rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	edp {
+		edp_hpd: edp_hpd {
+			rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_down>;
+		};
+	};
+
+	hdmi {
+		vcc50_hdmi_en: vcc50-hdmi-en {
+			rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	lcd {
+		lcd_enable_h: lcd-en {
+			rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		avdd_1v8_disp_en: avdd-1v8-disp-en {
+			rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	pmic {
+		dvs_1: dvs-1 {
+			rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
+		};
+
+		dvs_2: dvs-2 {
+			rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
+		};
+	};
+};