| Message ID | 000C66961D35964B9714611E548C10AD0C2A1D54@BGSMSX104.gar.corp.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Ok..., Will resubmit the patch with suggested changes. Regards, -Mahesh On 8/24/2015 3:53 PM, Jindal, Sonika wrote: > Can you please add the test case name to the commit message? > Also, this should be split into two patches one addressing the divide by zero error and another one to add plane formats. > > Regards, > Sonika > > -----Original Message----- > From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of Kumar, Mahesh > Sent: Friday, July 17, 2015 7:21 PM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH V2] drm/i915/skl+: Add YUV pixel format in Capability list > > GEN >= 9 supports YUV format for all planes, but it's not exported in Capability list of primary plane. Add YUV formats in skl_primary_formats list. > Don't rely on fb->bits_per_pixel as intel_framebuffer_init is not filling bits_per_pixel field of fb-struct for YUV pixel format. > This leads to divide by zero error during watermark calculation. > > V2: Don't break NV12 case. > > Signed-off-by: Kumar, Mahesh <mahesh1.kumar@intel.com> > Cc: Konduru, Chandra <chandra.konduru@intel.com> > --- > > IGT changes made for testcase will be sent in separate patch. > > drivers/gpu/drm/i915/intel_display.c | 4 ++++ > drivers/gpu/drm/i915/intel_pm.c | 3 ++- > 2 files changed, 6 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index af0bcfe..d31704a 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -72,6 +72,10 @@ static const uint32_t skl_primary_formats[] = { > DRM_FORMAT_ABGR8888, > DRM_FORMAT_XRGB2101010, > DRM_FORMAT_XBGR2101010, > + DRM_FORMAT_YUYV, > + DRM_FORMAT_YVYU, > + DRM_FORMAT_UYVY, > + DRM_FORMAT_VYUY, > }; > > /* Cursor formats */ > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 5eeddc9..5768f8c 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -3164,7 +3164,8 @@ static void skl_compute_wm_pipe_parameters(struct drm_crtc *crtc, > if (fb) { > p->plane[0].enabled = true; > p->plane[0].bytes_per_pixel = fb->pixel_format == DRM_FORMAT_NV12 ? > - drm_format_plane_cpp(fb->pixel_format, 1) : fb->bits_per_pixel / 8; > + drm_format_plane_cpp(fb->pixel_format, 1) : > + drm_format_plane_cpp(fb->pixel_format, 0); > p->plane[0].y_bytes_per_pixel = fb->pixel_format == DRM_FORMAT_NV12 ? > drm_format_plane_cpp(fb->pixel_format, 0) : 0; > p->plane[0].tiling = fb->modifier[0]; > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index af0bcfe..d31704a 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -72,6 +72,10 @@ static const uint32_t skl_primary_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_XRGB2101010, DRM_FORMAT_XBGR2101010, + DRM_FORMAT_YUYV, + DRM_FORMAT_YVYU, + DRM_FORMAT_UYVY, + DRM_FORMAT_VYUY, }; /* Cursor formats */ diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 5eeddc9..5768f8c 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3164,7 +3164,8 @@ static void skl_compute_wm_pipe_parameters(struct drm_crtc *crtc, if (fb) { p->plane[0].enabled = true; p->plane[0].bytes_per_pixel = fb->pixel_format == DRM_FORMAT_NV12 ? - drm_format_plane_cpp(fb->pixel_format, 1) : fb->bits_per_pixel / 8; + drm_format_plane_cpp(fb->pixel_format, 1) : + drm_format_plane_cpp(fb->pixel_format, 0); p->plane[0].y_bytes_per_pixel = fb->pixel_format == DRM_FORMAT_NV12 ? drm_format_plane_cpp(fb->pixel_format, 0) : 0; p->plane[0].tiling = fb->modifier[0];