| Message ID | 1302771827-26112-11-git-send-email-chris@chris-wilson.co.uk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Thu, Apr 14, 2011 at 10:03:44AM +0100, Chris Wilson wrote: > The docs warn us to be particularly careful not to write to a snooped > page through the GTT. Fortunately, this ties in very well with the > existing pwrite infrastucture to use the CPU domain where preferable and > the API already implies that the write is CPU linear.. Perhaps add "... careful not to write to a snooped page through the GTT *on pre-snb*". On snb it better work (but might be beneficial)! Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index ea8e7e2..dd2dc9d 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -1001,6 +1001,7 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data, if (obj->phys_obj) ret = i915_gem_phys_pwrite(dev, obj, args, file); else if (obj->gtt_space && + obj->cache_level == I915_CACHE_NONE && obj->base.write_domain != I915_GEM_DOMAIN_CPU) { ret = i915_gem_object_pin(obj, 0, true); if (ret)
The docs warn us to be particularly careful not to write to a snooped page through the GTT. Fortunately, this ties in very well with the existing pwrite infrastucture to use the CPU domain where preferable and the API already implies that the write is CPU linear.. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/i915_gem.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)