diff mbox

[16/17] drm/i915: Rewrite BXT HPD code to conform to pre-existing style

Message ID 1440708972-17112-17-git-send-email-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ville Syrjala Aug. 27, 2015, 8:56 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Rewrite the BXT hpd setup to match the way we do it on other platforms:
- Throw out BXT_HOTPLUG_CTL since it's the same as PCH_PORT_HOTPLUG
- Enable the HPD bits in the DE port IER in gen8_de_irq_postinstall()
- Update DE port IMR using bdw_update_port_irq()

Also throw out port D from bxt_port_hotplug_long_detect() since BXT only
goes up to C.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 36 +++++++++++++-----------------------
 drivers/gpu/drm/i915/i915_reg.h | 15 ---------------
 2 files changed, 13 insertions(+), 38 deletions(-)

Comments

Paulo Zanoni Aug. 28, 2015, 10:04 p.m. UTC | #1 
2015-08-27 17:56 GMT-03:00  <ville.syrjala@linux.intel.com>:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Rewrite the BXT hpd setup to match the way we do it on other platforms:
> - Throw out BXT_HOTPLUG_CTL since it's the same as PCH_PORT_HOTPLUG
> - Enable the HPD bits in the DE port IER in gen8_de_irq_postinstall()
> - Update DE port IMR using bdw_update_port_irq()
>
> Also throw out port D from bxt_port_hotplug_long_detect() since BXT only
> goes up to C.

Another commit which I would have split into many smaller ones :)

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 36 +++++++++++++-----------------------
>  drivers/gpu/drm/i915/i915_reg.h | 15 ---------------
>  2 files changed, 13 insertions(+), 38 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index a7c4efb..1a29dfd 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1300,8 +1300,6 @@ static bool bxt_port_hotplug_long_detect(enum port port, u32 val)
>                 return val & PORTB_HOTPLUG_LONG_DETECT;
>         case PORT_C:
>                 return val & PORTC_HOTPLUG_LONG_DETECT;
> -       case PORT_D:
> -               return val & PORTD_HOTPLUG_LONG_DETECT;
>         default:
>                 return false;
>         }
> @@ -2122,8 +2120,8 @@ static void bxt_hpd_irq_handler(struct drm_device *dev, u32 hotplug_trigger,
>         struct drm_i915_private *dev_priv = to_i915(dev);
>         u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
>
> -       dig_hotplug_reg = I915_READ(BXT_HOTPLUG_CTL);
> -       I915_WRITE(BXT_HOTPLUG_CTL, dig_hotplug_reg);
> +       dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
> +       I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
>
>         intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
>                            dig_hotplug_reg, hpd,
> @@ -3241,27 +3239,17 @@ static void ilk_hpd_irq_setup(struct drm_device *dev)
>  static void bxt_hpd_irq_setup(struct drm_device *dev)
>  {
>         struct drm_i915_private *dev_priv = dev->dev_private;
> -       u32 hotplug_port;
> -       u32 hotplug_ctrl;
> -
> -       hotplug_port = intel_hpd_enabled_irqs(dev, hpd_bxt);
> -
> -       hotplug_ctrl = I915_READ(BXT_HOTPLUG_CTL) & ~BXT_HOTPLUG_CTL_MASK;
> +       u32 hotplug_irqs, hotplug, enabled_irqs;
>
> -       if (hotplug_port & BXT_DE_PORT_HP_DDIA)
> -               hotplug_ctrl |= BXT_DDIA_HPD_ENABLE;
> -       if (hotplug_port & BXT_DE_PORT_HP_DDIB)
> -               hotplug_ctrl |= BXT_DDIB_HPD_ENABLE;
> -       if (hotplug_port & BXT_DE_PORT_HP_DDIC)
> -               hotplug_ctrl |= BXT_DDIC_HPD_ENABLE;
> -       I915_WRITE(BXT_HOTPLUG_CTL, hotplug_ctrl);
> +       enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_bxt);
> +       hotplug_irqs = BXT_DE_PORT_HOTPLUG_MASK;
>
> -       hotplug_ctrl = I915_READ(GEN8_DE_PORT_IMR) & ~hotplug_port;
> -       I915_WRITE(GEN8_DE_PORT_IMR, hotplug_ctrl);
> +       bdw_update_port_irq(dev_priv, hotplug_irqs, enabled_irqs);
>
> -       hotplug_ctrl = I915_READ(GEN8_DE_PORT_IER) | hotplug_port;
> -       I915_WRITE(GEN8_DE_PORT_IER, hotplug_ctrl);
> -       POSTING_READ(GEN8_DE_PORT_IER);
> +       hotplug = I915_READ(PCH_PORT_HOTPLUG);
> +       hotplug |= PORTC_HOTPLUG_ENABLE | PORTB_HOTPLUG_ENABLE |
> +               PORTA_HOTPLUG_ENABLE;
> +       I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
>  }
>
>  static void ibx_irq_postinstall(struct drm_device *dev)
> @@ -3555,7 +3543,9 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
>                                            GEN8_PIPE_FIFO_UNDERRUN;
>
>         de_port_enables = de_port_masked;
> -       if (IS_BROADWELL(dev_priv))
> +       if (IS_BROXTON(dev_priv))
> +               de_port_enables |= BXT_DE_PORT_HOTPLUG_MASK;
> +       else if (IS_BROADWELL(dev_priv))
>                 de_port_enables |= GEN8_PORT_DP_A_HOTPLUG;
>
>         dev_priv->de_irq_mask[PIPE_A] = ~de_pipe_masked;
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 0fc8888..8abae83 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5787,21 +5787,6 @@ enum skl_disp_power_wells {
>  #define GEN8_PCU_IIR 0x444e8
>  #define GEN8_PCU_IER 0x444ec
>
> -/* BXT hotplug control */
> -#define BXT_HOTPLUG_CTL                        0xC4030
> -#define   BXT_DDIA_HPD_ENABLE          (1 << 28)
> -#define   BXT_DDIA_HPD_STATUS          (3 << 24)
> -#define   BXT_DDIC_HPD_ENABLE          (1 << 12)
> -#define   BXT_DDIC_HPD_STATUS          (3 << 8)
> -#define   BXT_DDIB_HPD_ENABLE          (1 << 4)
> -#define   BXT_DDIB_HPD_STATUS          (3 << 0)
> -#define   BXT_HOTPLUG_CTL_MASK         (BXT_DDIA_HPD_ENABLE | \
> -                                        BXT_DDIB_HPD_ENABLE | \
> -                                        BXT_DDIC_HPD_ENABLE)
> -#define   BXT_HPD_STATUS_MASK          (BXT_DDIA_HPD_STATUS | \
> -                                        BXT_DDIB_HPD_STATUS | \
> -                                        BXT_DDIC_HPD_STATUS)
> -
>  #define ILK_DISPLAY_CHICKEN2   0x42004
>  /* Required on all Ironlake and Sandybridge according to the B-Spec. */
>  #define  ILK_ELPIN_409_SELECT  (1 << 25)
> --
> 2.4.6
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index a7c4efb..1a29dfd 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1300,8 +1300,6 @@  static bool bxt_port_hotplug_long_detect(enum port port, u32 val)
 		return val & PORTB_HOTPLUG_LONG_DETECT;
 	case PORT_C:
 		return val & PORTC_HOTPLUG_LONG_DETECT;
-	case PORT_D:
-		return val & PORTD_HOTPLUG_LONG_DETECT;
 	default:
 		return false;
 	}
@@ -2122,8 +2120,8 @@  static void bxt_hpd_irq_handler(struct drm_device *dev, u32 hotplug_trigger,
 	struct drm_i915_private *dev_priv = to_i915(dev);
 	u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
 
-	dig_hotplug_reg = I915_READ(BXT_HOTPLUG_CTL);
-	I915_WRITE(BXT_HOTPLUG_CTL, dig_hotplug_reg);
+	dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
+	I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
 
 	intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
 			   dig_hotplug_reg, hpd,
@@ -3241,27 +3239,17 @@  static void ilk_hpd_irq_setup(struct drm_device *dev)
 static void bxt_hpd_irq_setup(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	u32 hotplug_port;
-	u32 hotplug_ctrl;
-
-	hotplug_port = intel_hpd_enabled_irqs(dev, hpd_bxt);
-
-	hotplug_ctrl = I915_READ(BXT_HOTPLUG_CTL) & ~BXT_HOTPLUG_CTL_MASK;
+	u32 hotplug_irqs, hotplug, enabled_irqs;
 
-	if (hotplug_port & BXT_DE_PORT_HP_DDIA)
-		hotplug_ctrl |= BXT_DDIA_HPD_ENABLE;
-	if (hotplug_port & BXT_DE_PORT_HP_DDIB)
-		hotplug_ctrl |= BXT_DDIB_HPD_ENABLE;
-	if (hotplug_port & BXT_DE_PORT_HP_DDIC)
-		hotplug_ctrl |= BXT_DDIC_HPD_ENABLE;
-	I915_WRITE(BXT_HOTPLUG_CTL, hotplug_ctrl);
+	enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_bxt);
+	hotplug_irqs = BXT_DE_PORT_HOTPLUG_MASK;
 
-	hotplug_ctrl = I915_READ(GEN8_DE_PORT_IMR) & ~hotplug_port;
-	I915_WRITE(GEN8_DE_PORT_IMR, hotplug_ctrl);
+	bdw_update_port_irq(dev_priv, hotplug_irqs, enabled_irqs);
 
-	hotplug_ctrl = I915_READ(GEN8_DE_PORT_IER) | hotplug_port;
-	I915_WRITE(GEN8_DE_PORT_IER, hotplug_ctrl);
-	POSTING_READ(GEN8_DE_PORT_IER);
+	hotplug = I915_READ(PCH_PORT_HOTPLUG);
+	hotplug |= PORTC_HOTPLUG_ENABLE | PORTB_HOTPLUG_ENABLE |
+		PORTA_HOTPLUG_ENABLE;
+	I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
 }
 
 static void ibx_irq_postinstall(struct drm_device *dev)
@@ -3555,7 +3543,9 @@  static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
 					   GEN8_PIPE_FIFO_UNDERRUN;
 
 	de_port_enables = de_port_masked;
-	if (IS_BROADWELL(dev_priv))
+	if (IS_BROXTON(dev_priv))
+		de_port_enables |= BXT_DE_PORT_HOTPLUG_MASK;
+	else if (IS_BROADWELL(dev_priv))
 		de_port_enables |= GEN8_PORT_DP_A_HOTPLUG;
 
 	dev_priv->de_irq_mask[PIPE_A] = ~de_pipe_masked;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0fc8888..8abae83 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5787,21 +5787,6 @@  enum skl_disp_power_wells {
 #define GEN8_PCU_IIR 0x444e8
 #define GEN8_PCU_IER 0x444ec
 
-/* BXT hotplug control */
-#define BXT_HOTPLUG_CTL			0xC4030
-#define   BXT_DDIA_HPD_ENABLE		(1 << 28)
-#define   BXT_DDIA_HPD_STATUS		(3 << 24)
-#define   BXT_DDIC_HPD_ENABLE		(1 << 12)
-#define   BXT_DDIC_HPD_STATUS		(3 << 8)
-#define   BXT_DDIB_HPD_ENABLE		(1 << 4)
-#define   BXT_DDIB_HPD_STATUS		(3 << 0)
-#define   BXT_HOTPLUG_CTL_MASK		(BXT_DDIA_HPD_ENABLE | \
-					 BXT_DDIB_HPD_ENABLE | \
-					 BXT_DDIC_HPD_ENABLE)
-#define   BXT_HPD_STATUS_MASK		(BXT_DDIA_HPD_STATUS | \
-					 BXT_DDIB_HPD_STATUS | \
-					 BXT_DDIC_HPD_STATUS)
-
 #define ILK_DISPLAY_CHICKEN2	0x42004
 /* Required on all Ironlake and Sandybridge according to the B-Spec. */
 #define  ILK_ELPIN_409_SELECT	(1 << 25)