From patchwork Thu Sep 10 21:40:09 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jesse Barnes X-Patchwork-Id: 7155931 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id DCA689F326 for ; Thu, 10 Sep 2015 21:40:24 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 03BB02082C for ; Thu, 10 Sep 2015 21:40:24 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 2954A2082A for ; Thu, 10 Sep 2015 21:40:23 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8FB246E21E; Thu, 10 Sep 2015 14:40:22 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from gproxy7-pub.mail.unifiedlayer.com (gproxy7-pub.mail.unifiedlayer.com [70.40.196.235]) by gabe.freedesktop.org (Postfix) with SMTP id BF7896E211 for ; Thu, 10 Sep 2015 14:40:20 -0700 (PDT) Received: (qmail 10169 invoked by uid 0); 10 Sep 2015 21:40:20 -0000 Received: from unknown (HELO cmgw2) (10.0.90.83) by gproxy7.mail.unifiedlayer.com with SMTP; 10 Sep 2015 21:40:20 -0000 Received: from box514.bluehost.com ([74.220.219.114]) by cmgw2 with id FZgD1r0172UhLwi01ZgGEB; Thu, 10 Sep 2015 15:40:18 -0600 X-Authority-Analysis: v=2.1 cv=C6F6l2/+ c=1 sm=1 tr=0 a=9W6Fsu4pMcyimqnCr1W0/w==:117 a=9W6Fsu4pMcyimqnCr1W0/w==:17 a=cNaOj0WVAAAA:8 a=f5113yIGAAAA:8 a=TBVoxVdAAAAA:8 a=GhZ5P8ky69gA:10 a=noBwr2J6l1kA:10 a=ff-B7xzCdYMA:10 a=QyXUC8HyAAAA:8 a=sF8V80MHYm7lzDn1vJAA:9 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=virtuousgeek.org; s=default; h=Message-Id:Date:Subject:Cc:To:From; bh=AiDIU07dmcaPpal4V63hAv4N+x1KBaSOzv8cnj62lMU=; b=OF0FgjU9bibtqWtCIhH/Pe36g2NNCkl78LFdnN/OgLEtBgoZelzZMs9dxUpwhTSsnuBMVsSYkWKsGnKbVSIzX5mHVoPV+tjIg+0aM8YebC4xUc31gFXiri0bDSZHoxoD; Received: from [67.161.37.189] (port=37130 helo=localhost.localdomain) by box514.bluehost.com with esmtpsa (TLSv1.2:AES128-SHA256:128) (Exim 4.84) (envelope-from ) id 1Za9Zn-0003xl-PP; Thu, 10 Sep 2015 15:40:15 -0600 From: Jesse Barnes To: intel-gfx@lists.freedesktop.org Date: Thu, 10 Sep 2015 14:40:09 -0700 Message-Id: <1441921209-3430-1-git-send-email-jbarnes@virtuousgeek.org> X-Mailer: git-send-email 1.9.1 X-Identified-User: {10642:box514.bluehost.com:virtuous:virtuousgeek.org} {sentby:smtp auth 67.161.37.189 authed with jbarnes@virtuousgeek.org} Subject: [Intel-gfx] [PATCH] drm/i915: fix crash in error state readout on non-execlist platforms X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Looks like this was introduced in: commit d1675198ed1f21aec6e036336e4340c40b726497 Author: Alex Dai Date: Wed Aug 12 15:43:43 2015 +0100 drm/i915: Integrate GuC-based command submission This patch assumed LRC contexts and HWS layout, which is incorrect on platforms without execlists. This can lead to a crash in GPU error state readout on those platforms. I don't see a bug filed for this, but there may be one that I haven't found. Cc: Alex Dai Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_gpu_error.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 3379f9c..d0822f8 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -457,17 +457,24 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m, } if ((obj = error->ring[i].hws_page)) { + u64 hws_offset = lower_32_bits(obj->gtt_offset); + u32 *hws_page = &obj->pages[0][0]; + + if (i915.enable_execlists) { + hws_offset = obj->gtt_offset + LRC_PPHWSP_PN * + PAGE_SIZE; + hws_page = &obj->pages[LRC_PPHWSP_PN][0]; + } err_printf(m, "%s --- HW Status = 0x%08llx\n", - dev_priv->ring[i].name, - obj->gtt_offset + LRC_PPHWSP_PN * PAGE_SIZE); + dev_priv->ring[i].name, hws_offset); offset = 0; for (elt = 0; elt < PAGE_SIZE/16; elt += 4) { err_printf(m, "[%04x] %08x %08x %08x %08x\n", offset, - obj->pages[LRC_PPHWSP_PN][elt], - obj->pages[LRC_PPHWSP_PN][elt+1], - obj->pages[LRC_PPHWSP_PN][elt+2], - obj->pages[LRC_PPHWSP_PN][elt+3]); + hws_page[elt], + hws_page[elt+1], + hws_page[elt+2], + hws_page[elt+3]); offset += 16; } }