[1/3] dt-bindings: Add document of Rockchip mailbox
diff mbox

Message ID 1442228798-15191-2-git-send-email-wxt@rock-chips.com
State New
Headers show

Commit Message

Caesar Wang Sept. 14, 2015, 11:06 a.m. UTC
This add the necessary binding documentation for mailbox
found on RK3368 SoC.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

 .../bindings/mailbox/rockchip-mailbox.txt          | 33 ++++++++++++++++++++++
 1 file changed, 33 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt

Comments

Jassi Brar Oct. 6, 2015, 10:34 a.m. UTC | #1
On Mon, Sep 14, 2015 at 4:36 PM, Caesar Wang <wxt@rock-chips.com> wrote:
> This add the necessary binding documentation for mailbox
> found on RK3368 SoC.
>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> ---
>
>  .../bindings/mailbox/rockchip-mailbox.txt          | 33 ++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt
>
> diff --git a/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt b/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt
> new file mode 100644
> index 0000000..b9b4768
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt
> @@ -0,0 +1,33 @@
> +Rockchip mailbox
> +
> +The Rockchip mailbox is used by the Rockchip CPU cores to communicate
> +requests to MCU processor.
> +
> +Refer to ./mailbox.txt for generic information about mailbox device-tree
> +bindings.
> +
> +Required properties:
> +
> + - compatible: should be one of the following.
> +   - "rockchip,rk3368-mbox" for rk3368
> + - reg: physical base address of the controller and length of memory mapped
> +       region.
> +       physical base address of the share buffer and length of memory mapped
> +       region.
Please make shared-sram a property of user drivers.

Location and size of shared-memory is a platform property, mailbox
controller doesn't need sram to function.
  For example, protocol on some platform, with this controller, may be
trivial enough to not need a shared sram... say only 32-bits wide
requests and responses which can be passed via mailbox registers
directly.   mbox_client.tx_prepare() is where the user driver sets up
the shared-memory.
Rob Herring Oct. 6, 2015, 2:50 p.m. UTC | #2
On Mon, Sep 14, 2015 at 6:06 AM, Caesar Wang <wxt@rock-chips.com> wrote:
> This add the necessary binding documentation for mailbox
> found on RK3368 SoC.
>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> ---
>
>  .../bindings/mailbox/rockchip-mailbox.txt          | 33 ++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt
>
> diff --git a/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt b/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt
> new file mode 100644
> index 0000000..b9b4768
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt
> @@ -0,0 +1,33 @@
> +Rockchip mailbox
> +
> +The Rockchip mailbox is used by the Rockchip CPU cores to communicate
> +requests to MCU processor.
> +
> +Refer to ./mailbox.txt for generic information about mailbox device-tree
> +bindings.
> +
> +Required properties:
> +
> + - compatible: should be one of the following.
> +   - "rockchip,rk3368-mbox" for rk3368
> + - reg: physical base address of the controller and length of memory mapped
> +       region.
> +       physical base address of the share buffer and length of memory mapped

s/share/shared/

> +       region.
> + - interrupts: The interrupt number to the cpu. The interrupt specifier format
> +       depends on the interrupt controller.

Need to specify the value of #mbox-cells.

> +
> +Example:
> +--------
> +
> +/* RK3368 */
> +mbox: mbox@ff6b0000 {
> +       compatible = "rockchip,rk3368-mailbox";
> +       reg = <0x0 0xff6b0000 0x0 0x1000>,
> +             <0x0 0xff8cf000 0x0 0x1000>; /* the end 4k of sram */

If this is just onchip SRAM usable for anything, then use the SRAM
binding (misc/sram.txt). It has provisions for defining the use.

> +       interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
> +                    <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
> +                    <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
> +                    <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
> +       #mbox-cells = <1>;
> +};
> --
> 1.9.1
>
Caesar Wang Oct. 22, 2015, 1:56 a.m. UTC | #3
I'm missing this patch for long time.

? 2015?10?06? 22:50, Rob Herring ??:
> On Mon, Sep 14, 2015 at 6:06 AM, Caesar Wang <wxt@rock-chips.com> wrote:
>> This add the necessary binding documentation for mailbox
>> found on RK3368 SoC.
>>
>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>> ---
>>
>>   .../bindings/mailbox/rockchip-mailbox.txt          | 33 ++++++++++++++++++++++
>>   1 file changed, 33 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt
>>
>> diff --git a/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt b/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt
>> new file mode 100644
>> index 0000000..b9b4768
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt
>> @@ -0,0 +1,33 @@
>> +Rockchip mailbox
>> +
>> +The Rockchip mailbox is used by the Rockchip CPU cores to communicate
>> +requests to MCU processor.
>> +
>> +Refer to ./mailbox.txt for generic information about mailbox device-tree
>> +bindings.
>> +
>> +Required properties:
>> +
>> + - compatible: should be one of the following.
>> +   - "rockchip,rk3368-mbox" for rk3368
>> + - reg: physical base address of the controller and length of memory mapped
>> +       region.
>> +       physical base address of the share buffer and length of memory mapped
> s/share/shared/

Done.

>
>> +       region.
>> + - interrupts: The interrupt number to the cpu. The interrupt specifier format
>> +       depends on the interrupt controller.
> Need to specify the value of #mbox-cells.

Done.
>> +
>> +Example:
>> +--------
>> +
>> +/* RK3368 */
>> +mbox: mbox@ff6b0000 {
>> +       compatible = "rockchip,rk3368-mailbox";
>> +       reg = <0x0 0xff6b0000 0x0 0x1000>,
>> +             <0x0 0xff8cf000 0x0 0x1000>; /* the end 4k of sram */
> If this is just onchip SRAM usable for anything, then use the SRAM
> binding (misc/sram.txt). It has provisions for defining the use.

Okay,  we don't need define the shared-sram in this document.

>> +       interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
>> +                    <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
>> +                    <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
>> +                    <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
>> +       #mbox-cells = <1>;
>> +};
>> --
>> 1.9.1
>>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
Caesar Wang Oct. 22, 2015, 2:07 a.m. UTC | #4
Hello Jassi,

Sorry for delay reply.
? 2015?10?06? 18:34, Jassi Brar ??:
> On Mon, Sep 14, 2015 at 4:36 PM, Caesar Wang <wxt@rock-chips.com> wrote:
>> This add the necessary binding documentation for mailbox
>> found on RK3368 SoC.
>>
>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>> ---
>>
>>   .../bindings/mailbox/rockchip-mailbox.txt          | 33 ++++++++++++++++++++++
>>   1 file changed, 33 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt
>>
>> diff --git a/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt b/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt
>> new file mode 100644
>> index 0000000..b9b4768
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt
>> @@ -0,0 +1,33 @@
>> +Rockchip mailbox
>> +
>> +The Rockchip mailbox is used by the Rockchip CPU cores to communicate
>> +requests to MCU processor.
>> +
>> +Refer to ./mailbox.txt for generic information about mailbox device-tree
>> +bindings.
>> +
>> +Required properties:
>> +
>> + - compatible: should be one of the following.
>> +   - "rockchip,rk3368-mbox" for rk3368
>> + - reg: physical base address of the controller and length of memory mapped
>> +       region.
>> +       physical base address of the share buffer and length of memory mapped
>> +       region.
> Please make shared-sram a property of user drivers.

As Rob points out,
maybe, don't we need also define it in user drivers.
As the SRAM binding (misc/sram.txt) had defined.

I just make the SCPI protocol client driver to work for mailbox.
>
> Location and size of shared-memory is a platform property, mailbox
> controller doesn't need sram to function.
>    For example, protocol on some platform, with this controller, may be
> trivial enough to not need a shared sram... say only 32-bits wide
> requests and responses which can be passed via mailbox registers
> directly.   mbox_client.tx_prepare() is where the user driver sets up
> the shared-memory.
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip

Patch
diff mbox

diff --git a/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt b/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt
new file mode 100644
index 0000000..b9b4768
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt
@@ -0,0 +1,33 @@ 
+Rockchip mailbox
+
+The Rockchip mailbox is used by the Rockchip CPU cores to communicate
+requests to MCU processor.
+
+Refer to ./mailbox.txt for generic information about mailbox device-tree
+bindings.
+
+Required properties:
+
+ - compatible: should be one of the following.
+   - "rockchip,rk3368-mbox" for rk3368
+ - reg: physical base address of the controller and length of memory mapped
+	region.
+	physical base address of the share buffer and length of memory mapped
+	region.
+ - interrupts: The interrupt number to the cpu. The interrupt specifier format
+	depends on the interrupt controller.
+
+Example:
+--------
+
+/* RK3368 */
+mbox: mbox@ff6b0000 {
+	compatible = "rockchip,rk3368-mailbox";
+	reg = <0x0 0xff6b0000 0x0 0x1000>,
+	      <0x0 0xff8cf000 0x0 0x1000>; /* the end 4k of sram */
+	interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+	#mbox-cells = <1>;
+};